|
|
PDF ADMC200 Data sheet ( Hoja de datos )
| Número de pieza | ADMC200 | |
| Descripción | Motion Coprocessor | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ADMC200 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
a
Motion Coprocessor
ADMC200
FEATURES
Analog Input Block
11-Bit Resolution Analog-to-Digital (A/D) Converter
4 Single-Ended Simultaneously Sampled Analog Inputs
3.2 s Conversion Time/Channel
0 V–5 V Analog Input Range
Internal 2.5 V Reference
PWM Synchronized Sampling Capability
12-Bit PWM Timer Block
Three-Phase Center-Based PWM
1.5 kHz–25 kHz PWM Switching Frequency Range
Programmable Deadtime
Programmable Pulse Deletion
PWM Synchronized Output
External PWM Shutdown
Vector Transformation Block
12-Bit Vector Transformations
Forward and Reverse Clarke Transformations
Forward and Reverse Park Rotations
2.9 s Transformation Time
DSP & Microcontroller Interface
12-Bit Memory Mapped Registers
Twos Complement Data Format
6.25 MHz to 25 MHz Operating Clock Range
68-Lead PLCC Package
Single 5 V DC Power Supply
Industrial Temperature Range
GENERAL DESCRIPTION
The ADMC200 is a motion coprocessor that can be used with
either microcontrollers or digital signal processors (DSP). It
provides the functionality that is required to implement a digital
control system. In a typical application, the DSP or micro-
controller performs the control algorithms (position, speed,
torque and flux loops) and the ADMC200 provides the neces-
sary motor control functions: analog current data acquisition,
vector transformation, and PWM drive signals.
PRODUCT HIGHLIGHTS
Simultaneous Sampling of Four Inputs
A four channel sample and hold amplifier allows three-phase
motor currents to be sampled simultaneously, reducing errors
from phase coherency. Sample and hold acquisition time is
1.6 µs and conversion time per channel is 3.2 µs (using a 12.5 MHz
system clock).
RESET
WR
A0–3
RD
CS
IRQ
CLK
REFOUT
REFIN
CONVST
U
V
W
AUX
PWMSYNC
A
AP
B
BP
C
CP
STOP
FUNCTIONAL BLOCK DIAGRAM
DATABUS
EMBEDDED
CONTROL
SEQUENCER
INTERNAL
REFERENCE
11-BIT
A/D
CONVERTER
CONTROL BUS
CONTROL
REGISTERS
VECTOR
TRANSFORMATION
BLOCK
12-BIT
PWM TIMER
BLOCK
D0 – D11
Flexible Analog Channel Sequencing
The ADMC200 support acquisition of 2, 3, or 4 channels per
group. Converted channel results are stored in registers and the
data can be read in any order. The sampling and conversion
time for two channels is 8 µs, three channels is 11.2 µs, and four
channels is 14.4 µs (using a 12.5 MHz system clock).
Embedded Control Sequencer
The embedded control sequencer off-loads the DSP or micro-
processor, reducing the instructions required to read analog in-
put channels, control PWM timers and perform vector trans-
formations. This frees the host processor for performing control
algorithms.
Fast DSP/Microprocessor Interface
The high speed digital interface allows direct connection to
16-bit digital signal processors and microprocessors. The
ADMC200 has 12 bit memory mapped registers with twos
complement data format and can be mapped directly into the
data memory map of a DSP. This allows for a single instruction
read and write interface.
Integration
The ADMC200 integrates a four channel simultaneous sam-
pling analog-to-digital converter, analog reference, vector trans-
formation, and three-phase PWM timers into a 68-lead PLCC.
Integration reduces cost, board space, power consumption, and
design and test time.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
1 page  
ADMC200
PIN DESIGNATIONS
Pin Mnemonic Type
1
2
3
4–9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34–36
37
38
39
40
D9
D10
D11
NC
VDD
A3
A2
A1
A0
NC
RESET
CONVST
IRQ
VDD
DGND
CLK
WR
RD
CS
NC
VDD
AGND
AGND
U
V
W
SGND
REFIN
NC
AUX
REFOUT
VDD
DGND
BIDIR
BIDIR
BIDIR
SUP
I/P
I/P
I/P
I/P
I/P
I/P
O/P
SUP
GND
I/P
I/P
I/P
I/P
SUP
GND
GND
I/P
I/P
I/P
GND
I/P
I/P
O/P
SUP
GND
Description
Data Bit 9
Data Bit 10
Data Bit 11, MSB
No Connect
+5 V Digital Power Supply
Address Bit 3, MSB
Address Bit 2
Address Bit 1
Address Bit 0, LSB
No Connect
Chip Reset
A/D Conversion Start
Interrupt Request (Pull-Up Required)
+5 V Digital Power Supply
Digital Ground
External Clock Input
Write Select
Output Enable/Read
Chip Select
No Connect
+5 V Analog Power Supply
Analog Ground
Analog Ground
Analog Input U
Analog Input V
Analog Input W
Analog Signal Ground
Analog Reference Input
No Connect
Auxiliary Analog Input
Internal 2.5 V Analog Reference
+5 V Digital Power Supply
Digital Ground
PIN CONFIGURATION
Pin Mnemonic Type
41 DGND
GND
42 DGND
GND
43 DGND
GND
44 VDD
45 NC
SUP
46 DGND
GND
47 STOP
I/P
48 PWMSYNC O/P
49 CP
O/P
50 C
51 BP
O/P
O/P
52 NC
53 B
54 AP
O/P
O/P
55 A
56 DGND
57 DGND
58 DGND
59 VDD
60 D0
61 D1
62 D2
63 D3
64 D4
65 D5
66 D6
67 D7
68 D8
O/P
GND
GND
GND
SUP
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
Description
Digital Ground
Digital Ground
Digital Ground
+5 V Digital Power Supply
No Connect
Digital Ground
PWM Timer Output Disable
PWM Synchronization Output
PWM Timer Output C
Prime
PWM Timer Output C
PWM Timer Output B
Prime
No Connect
PWM Timer Output B
PWM Timer Output A
Prime
PWM Timer Output A
Digital Ground
Digital Ground
Digital Ground
+5 V Digital Power Supply
Data Bit 0, LSB
Data Bit 1
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
Data Bit 8
Pin Types
Pin Types
I/P = Input Pin
BIDIR = Bidirectional Pin
O/P = Output Pin SUP = Supply Pin
GND = Ground Pin
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
VDD 10
A3 11
A2 12
A1 13
A0 14
NC 15
RESET 16
CONVST 17
IRQ 18
VDD 19
DGND 20
CLK 21
WR 22
RD 23
CS 24
NC 25
VDD 26
PIN 1
IDENTIFIER
ADMC200
TOP VIEW
(Not to Scale)
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60 D0
59 VDD
58 DGND
57 DGND
56 DGND
55 A
54 AP
53 B
52 NC
51 BP
50 C
49 CP
48 PWMSYNC
47 STOP
46 DGND
45 NC
44 VDD
NC = NO CONNECT
REV. B
–5–
5 Page 
ADMC200
Name
ID/PHV1/VX
IQ/PHV2
IX/PHV3
IY/VY
ADCV
ADCW
ADCAUX
ADCU
SYSCTRL
SYSSTAT
Table IV. Read Registers
A3 A2 A1 A0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Register Function
Reverse Rotation Result (IDS)/Forward Result Cos +0°
Reverse Rotation Result (IQS)/Forward Cos +120°
Reverse Clarke Cos + 0°/Forward Result Cos +240°
Reverse Clarke Cos +90°/Forward Cos +90°
Reserved
A/D Conversion Result Channel V
A/D Conversion Result Channel W
A/D Conversion Result Auxiliary Channel
A/D Conversion Result Channel U
Reserved
Reserved
Reserved
Reserved
System Control
System Status
Reserved
DESCRIPTION OF THE REGISTERS
All unspecified register locations are reserved.
SYSCTRL System Control Register (See Table V and VI)
SYSSTAT
ADCU
ADCV
ADCW
System Status Register (See Table VII)
These registers contain the results from the first
three analog input channels U, V, and W. The
output data format is twos complement and
therefore Bit 0 is always zero as the A/D
converter has 11-bit resolution.
ADCAUX
This register contains the conversion result
of the auxiliary channel.
PWMTM
PWM Master Switching Period
PWMCHA PWM Channel A on-time
PWMCHB PWM Channel B on-time
PWMCHC PWM Channel C on-time
PWMDT
PWM Programmable Deadtime Value
PWMPD
PWM Programmable Pulse Deletion Value
ID/IQ
These are the results of the reverse rotation
(torque and flux components).
PHV1/2/3
These are the results from the forward
Clarke Transformation.
PHIP1/2/3
The inputs for reverse vector transformation
(Clarke and Park).
IX/IY
These registers contain the results of the Clarke
transformation that are the inputs to the reverse
Park rotation.
VX, VY
VX , VY contain the results of the forward
Park rotation.
RHOP
RHOP is the angle used during the forward vec-
tor transformation. Writing to the RHOP regis-
ter causes the forward rotation to start based on
values in RHOP, VD and VQ registers.
RHO
RHO is the angle used during the reverse vector
transformation. Writing to this register starts
the reverse rotation using the values in the
RHO, PHIP1/2/3 registers.
RHO and RHOP are unsigned ratios of 360°.
For example, 45 degrees would be 45/360 × 212.
Table V. System Control (SYSCTRL) Registers
Bit Function
RESET
Default
0 Reserved, Must Be 0
1 Reserved, Must Be 0
3 Enables U Channel Conversion
(1 = Enable) Three/Three-Phase Mode
4 Enables AUX Channel Conversion
(0 = Disable, 1 = Enable)
5 Divide External Clock by 2
(0 = No, 1 = Yes)
6 Park Interrupt Enable
7 ADC Interrupt Enable
(0 = Disable, 1 = Enable)
8 IRQ Pin Format (Edge or Level Based
Interrupt Requests) (0 = Edge)
10 Reverse Rotation (0 = 2/3, 1 = 3/3)
Forward Rotation (1 = Enable)
0
0
0
0
0
0
0
0
0
Bit 0, 1 Reserved for future use. Always write 0 to these bits.
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Channel U Conversion Enable. If Bit 3 is set to 1, then
Channel U will be converted along with V, W and/or
AUX. This bit selects three-/three-phase mode.
Aux Channel Conversion Enable. If Bit 4 is set to
1, then the AUX input will be converted along with
the channels V, W and/or U.
If Bit 5 = 1, then the external clock will be divided by
two to derive the system clock. If the external clock
frequency is greater than 12.5 MHz, then this bit must
be set.
Park Interrupt Enable. This bit allows interrupts to
be generated when the Park rotation is completed.
ADC Interrupt Enable. This bit allows interrupts to
be generated via the IRQ pin when the analog-to-
digital conversion process is complete.
REV. B
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADMC200.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ADMC200 | Motion Coprocessor | Analog Devices |
| ADMC200AP | Motion Coprocessor | Analog Devices |
| ADMC201 | Motion Coprocessor | Analog Devices |
| ADMC201AP | Motion Coprocessor | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |