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ADMC328TR-xxx-yy 데이터시트 PDF




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기능 28-Lead ROM-Based DSP Motor Controller with Current Sense
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ADMC328TR-xxx-yy 데이터시트, 핀배열, 회로
a 28-Lead ROM-Based
DSP Motor Controller with Current Sense
ADMC328
TARGET APPLICATIONS
Washing Machines, Refrigerator Compressors, Fans,
Pumps, Industrial Variable Speed Drives, Automotive
MOTOR TYPES
Permanent Magnet Synchronous Motors (PMSM)
Brushless DC Motors (BDCM)
FEATURES
20 MIPS Fixed-Point DSP Core
Single Cycle Instruction Execution (50 ns)
ADSP-21xx Family Code Compatible
Independent Computational Units
ALU
Multiplier/Accumulator
Barrel Shifter
Multifunction Instructions
Single Cycle Context Switch
Powerful Program Sequencer
Zero Overhead Looping
Conditional Instruction Execution
Two Independent Data Address Generators
Memory Configuration
512 ؋ 24-Bit Program Memory RAM
4K ؋ 24-Bit Program Memory ROM
512 ؋ 16-Bit Data Memory RAM
Three-Phase 16-Bit PWM Generator
16-Bit Center-Based PWM Generator
Programmable Dead Time and Narrow Pulse Deletion
Edge Resolution to 50 ns
150 Hz Minimum Switching Frequency
Double/Single Duty Cycle Update Mode Control
Programmable PWM Pulsewidth
Special Crossover Function for Brushless DC Motors
Individual Enable and Disable for Each PWM Output
High Frequency Chopping Mode for Transformer
Coupled Gate Drives
External PWMTRIP Pin
Integrated ADC Subsystem
Five Analog Inputs Plus One Dedicated ISENSE Input
Acquisition Synchronized to PWM Switching Frequency
Internal Voltage Reference
9-Pin Digital I/O Port
Bit Configurable as Input or Output
Change of State Interrupt Support
Two 8-Bit Auxiliary PWM Timers
Synthesized Analog Output
Programmable Frequency
0% to 100% Duty Cycle
Two Programmable Operational Modes
Independent Mode/Offset Mode
16-Bit Watchdog Timer
Programmable 16-Bit Internal Timer with Prescaler
Double Buffered Synchronous Serial Port
Hardware Support for UART Emulation
Integrated Power-On Reset Function
28-Lead SOIC or PDIP Package Options
FUNCTIONAL BLOCK DIAGRAM
ADSP-2100 BASE
ARCHITECTURE
DATA
ADDRESS
GENERATORS
DAG 1 DAG 2
PROGRAM
SEQUENCER
PROGRAM
ROM
4K ؋ 24
PROGRAM
RAM
512 ؋ 24
MEMORY
BLOCK
DATA
MEMORY
512 ؋ 16
PROGRAM MEMORY ADDRESS
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
ARITHMETIC UNITS
ALU MAC SHIFTER
POR
TIMER
VREF
2.5V
5
ANALOG
INPUTS
ISENSE
AMP
& TRIP
16-BIT
3-PHASE
PWM
SERIAL PORT
SPORT1
9-BIT
PIO
2 ؋ 8-BIT
AUX
PWM
WATCH-
DOG
TIMER
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000




ADMC328TR-xxx-yy pdf, 반도체, 판매, 대치품
ADMC328
TIMING PARAMETERS
Parameter
Clock Signals
Signal tCK is defined as 0.5 tCKIN. The ADMC328 uses an input clock with a
frequency equal to half the instruction rate; a 10 MHz input clock (which is
equivalent to 100 ns) yields a 50 ns processor cycle (equivalent to 20 MHz). When
tCK values are within the range of 0.5 tCKIN period, they should be substituted for
all relevant timing parameters to obtain specification value.
Example: tCKH = 0.5 tCK – 10 ns = 0.5 (50 ns) – 10 ns = 15 ns.
Timing Requirements:
tCKIN
CLKIN Period
tCKIL
CLKIN Width Low
tCKIH
CLKIN Width High
Switching Characteristics:
tCKL CLKOUT Width Low
tCKH CLKOUT Width High
tCKOH
CLKIN High to CLKOUT High
Control Signals
Timing Requirement:
tRSP RESET Width Low
PWM Shutdown Signals
Timing Requirement:
tPWMTPW PWMTRIP Width Low
NOTES
1Applies after power-up sequence is complete.
Specifications subject to change without notice.
CLKIN
tCKIN
tCKIH
tCKIL
tCKOH
tCKH
CLKOUT
tCKL
Figure 1. Clock Signals
Min
100
20
20
0.5 tCK – 10
0.5 tCK – 10
0
5 tCK1
tCK
Max
150
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
–4– REV. B

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ADMC328TR-xxx-yy 전자부품, 판매, 대치품
GENERAL DESCRIPTION
The ADMC328 is a low cost, single-chip DSP-based controller,
suitable for permanent magnet synchronous motors and brushless
dc motors. The ADMC328 integrates a 20 MIPS, fixed-point
DSP core with a complete set of motor control and system
peripherals that permits fast, efficient development of motor
controllers.
The DSP core of the ADMC328 is the ADSP-2171, which is
completely code compatible with the ADSP-21xx DSP family
and combines three computational units, data address generators
and a program sequencer. The computational units comprise an
ALU, a multiplier/accumulator (MAC) and a barrel shifter. The
ADSP-2171 adds new instructions for bit manipulation, multipli-
cation (× squared), biased rounding and global interrupt masking.
The system peripherals are the power-on reset circuit (POR),
the watchdog timer and a synchronous serial port. The serial
port is configurable and double buffered, with hardware support
for UART and SCI port emulation.
ADMC328
The ADMC328 provides 512 × 24-bit program memory RAM,
4K × 24-bit program memory ROM and 512 × 16-bit data
memory RAM. The program memory ROM contains the user-
specified program code and is defined using a single metal layer
mask. The program and data memory RAM can be used for
dynamic data storage.
The motor control peripherals of the ADMC328 comprise a
12-bit analog data acquisition system with five analog input
channels and one dedicated ISENSE function (combining internal
amplification, sampling, and overcurrent PWM shutdown
features) and an internal voltage reference. In addition, a three-
phase, 16-bit, center-based PWM generation unit can be used to
produce high accuracy PWM signals with minimal processor
overhead. The ADMC328 also contains two auxiliary PWM
outputs, and nine lines of digital I/O.
Because the ADMC328 has a limited number of pins, a number
of functions such as the auxiliary PWM and the serial commu-
nication port are multiplexed with the nine programmable input/
output (PIO) pins. The pin functions can be independently
selected to allow maximum flexibility for different applications.
DATA
ADDRESS
GENERATOR
#1
DATA
ADDRESS
GENERATOR
#2
INSTRUCTION
REGISTER
PROGRAM
SEQUENCER
14
14
24
BUS
EXCHANGE
16
PM ROM
4K ؋ 24
PM RAM
512 ؋ 24
DM RAM
512 ؋ 16
PMA BUS
DMA BUS
PMD BUS
DMD BUS
INPUT REGS
ALU
OUTPUT REGS
INPUT REGS
MAC
OUTPUT REGS
16
R BUS
INPUT REGS
SHIFTER
OUTPUT REGS
CONTROL
LOGIC
COMPANDING
CIRCUITRY
Figure 3. DSP Core Block Diagram
TIMER
TRANSMIT REG
RECEIVE REG
SERIAL
PORT
6
REV. B
–7–

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부품번호상세설명 및 기능제조사
ADMC328TR-xxx-yy

28-Lead ROM-Based DSP Motor Controller with Current Sense

Analog Devices
Analog Devices

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