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부품번호 ADP3152 기능
기능 5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor
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ADP3152 데이터시트, 핀배열, 회로
a
FEATURES
5-Bit Digitally Programmable 1.8 V to 3.5 V Output
Voltage
Dual N-Channel Synchronous Driver
Total Output Accuracy ؎1% (0؇C to 70؇C)
High Efficiency
Current-Mode Operation
Short Circuit Protection
Power Good Output
Integrated Overvoltage Protection Crowbar
16-Lead SOIC Package
VRM 8.2 Compatible
APPLICATIONS
Desktop PC Power Supply for:
Pentium II Processor
Pentium Pro Processor
Pentium Processor
AMD–K6 Processor
VRM Modules
5-Bit Programmable Synchronous
Switching Regulator Controller
for Pentium® II Processor
ADP3152
GENERAL DESCRIPTION
The ADP3152 is a highly efficient synchronous switching regu-
lator controller optimized for Pentium II Processor applications
where 5 V is stepped down to a digitally controlled output volt-
age between 1.8 V and 3.5 V. Using a 5-bit DAC to read a
voltage identification (VID) code directly from the processor,
the ADP3152 uses a current mode constant off-time architec-
ture to generate its precise output voltage.
The ADP3152 drives two N-channel MOSFETS in a synchro-
nous rectified buck converter, at a maximum switching fre-
quency of 250 kHz. Using the recommended loop compensation
and guidelines, the ADP3152 provides a dc/dc converter that
meets Intel’s stringent transient specifications with a minimum
number of output capacitors and smallest footprint. Additionally,
the current mode architecture also provides guaranteed short
circuit protection and adjustable current limiting.
VCC
+12V
VIN
+5V
22F
R1
1F
VCC
SD DRIVE1
ADP3152
IRL3103
CMP
SENSE+
R2
CCOMP
1nF
CT SENSE–
150pF
AGND
DRIVE2
PGND
IRL3103
VID0–VID4
+ CIN
L
2.5H
RSENSE
6.7m
10BQ015
+ CO
VO
1.8V–3.5V
14A
5-BIT CODE
Figure 1. Typical Application
Pentium is a registered trademark of Intel Corporation.
All other trademarks are the property of their respective holders.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998




ADP3152 pdf, 반도체, 판매, 대치품
ADP3152
P
SYSTEM
100k
ADP3152
1
VID1
16
VID0
2
VID2
15
PGND
3
VID3
14
DRIVE1
4
VID4
13
DRIVE2
5
AGND
VCC 12
6
SD
PWRGD 11
7
SENSE–
10
CMP
8
SENSE+
9
CT
CT
150pF
1nF
22
+
22F
1F
IRL3103
IRL3103
3 ؋2700F/10V
L2
1.7H
+ +++
1F
VCC + 12V
VIN + 5V
+5V RTN
+12V RTN
L1
2.5H
RSENSE
6.7m
10BQ015
2700F ؋6 (10V)
++++++
VO
1.8V–3.5V
0-14A
R1
150k
R2
39k
2nF
CCOMP
RTN
220
220
Figure 2. Typical Application for Pentium II
SD 6
VCC DRIVE1 DRIVE2 PGND AGND PWRGD
12 14
13 15
5
11
SENSE+ SENSE–
87
VREF + 15%
DELAY
ADP3152
NONOVERLAP
DRIVE
CROWBAR
IN
S
Q
R
VT2
CMPT
VREF + 5% VREF – 5%
CMPI
VT1
gm
REFERENCE
2R
1.20V
16 VID0
1 VID1
VREF
R
2 VID2
3 VID3
OFF-TIME
CONTROL
SENSE–
DAC
4 VID4
9 10
CT CMP
Figure 3. Functional Block Diagram
–4– REV. 0

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ADP3152 전자부품, 판매, 대치품
ADP3152
expensive microprocessor from destruction. The crowbar func-
tion releases at approximately 50% of the nominal output volt-
age. For example, if the output is programmed to 2.0 V, but is
pulled up to 2.3 V or above, the crowbar will turn on the lower
MOSFET. If in this case the output is pulled down to less than
1.0 V, the crowbar will release, allowing the output voltage to
recover to 2.0 V.
Shutdown
The ADP3152 has a shutdown pin which is pulled logic low by
an internal resistor. In this condition the device functions nor-
mally. This pin should be pulled high externally to disable the
output drives.
Calculation of Component Values
The design parameters for a typical 300 MHz Pentium II appli-
cation (Figure 2) are as follows:
Input voltage: VIN = 5 V
Auxiliary input: VCC = 12 V
Output voltage: VO = 2.8 V
Maximum output current:
IOMAX = 14.2 Adc
Minimum output current:
IOMIN = 0.8 Adc
Static tolerance of the supply voltage for the processor core:
VOST+ = 100 mV
VOST– = –60 mV
Transient tolerance (for less than 2 µs) of the supply voltage for
the processor core when the load changes between the minimum
and maximum values with a di/dt of 30 A/µs:
VOTR+ = 130 mV
VOTR– = –130 mV
Input current di/dt when the load changes between the mini-
mum and maximum values: less than 0.1 A/µs
The above requirements correspond to Intel’s published power
supply requirements based on VRM 8.2 guidelines.
CT Selection for Operating Frequency
The ADP3152 uses a constant-off-time architecture with tOFF
determined by an external timing capacitor CT. Each time the
high side N-channel MOSFET switch turns on, the voltage
across CT is reset to approximately 3.3 V. During the off time,
CT is discharged by a constant current of 65 µA to 2.3 V, that is
by 1 V. The value of the off time is calculated from the pre-
ferred continuous-mode operating frequency. Assuming a nomi-
nal operating frequency of fNOM = 200 kHz at an output voltage
of VO = 2.8 V, the corresponding off time is:
tOFF
=
1
VO
V IN

1
f NOM
= 2.2 µs
The timing capacitor can be calculated from the equation:
CT
= tOFF
× 65 µA = 143
1V
pF
The converter operates at the nominal operating frequency only
at the above specified VO and at light load. At higher VO, and
heavy load, the operating frequency decreases due to the para-
sitic voltage drops across the power devices. The actual mini-
mum frequency at VO = 2.8 V is calculated to be 160 kHz (see
Equation 1 below). Where
IIN
RIN
RDS(ON)HSF
RDS(ON)LSF
RSENSE
RL
is the input dc current (assuming an efficiency
of 90%, IIN = 9 A)
is the resistance of the input filter (estimated
value: 7 m)
is the resistance of the high side MOSFET
(estimated value: 10 m)
is the resistance of the low side MOSFET
(estimated value: 10 m)
is the resistance of the sense resistor
(estimated value: 7 m)
is the resistance of the inductor (estimated
value: 6 m)
CO Selection—Determining the ESR
The selection of the output capacitor is driven by the required
ESR and capacitance CO. The ESR must be small enough that
both the resistive voltage deviation due to a step change in the
load current and the output ripple voltage stay below the values
defined in the specification of the supplied microprocessor. The
capacitance, CO, must be large enough that the output is held
up while the inductor current ramps up or down to the value
corresponding to the new load current.
The total static tolerance of the Pentium II processor is 160 mV.
Taking into account the ±1% setpoint accuracy of the ADP3152,
and assuming a 0.5% (or 14 mV) peak-to-peak ripple, the al-
lowed static voltage deviation of the output voltage when the
load changes between the minimum and maximum values is
0.08 V. Assuming a step change of I = IOMAX–IOMIN = 13.4 A,
and allocating all of the total allowed static deviation to the
contribution of the ESR sets the following limit:
RE(MAX ) = ESRMAX1 = 0.08 = 5.9 m
13. 4
f MIN
=1
tOFF
× V IN IIN RIN IOMAX (RDS(ON )HSF + RSENSE + RL ) –VO
= 160
V IN IIN RIN IOMAX (RDS(ON )HSF + RSENSE + RL RDS(ON )LSF )
kHz
(1)
REV. 0
–7–

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