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PDF AD8564 Data sheet ( Hoja de datos )
| Número de pieza | AD8564 | |
| Descripción | Quad 7 ns Single Supply Comparator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
5 V single-supply operation
7 ns propagation delay
Low power
Separate input and output sections
TTL/CMOS logic-compatible outputs
Wide output swing
TSSOP, SOIC, and PDIP packages
APPLICATIONS
High speed timing
Line receivers
Data communications
High speed V-to-F converters
Battery operated instrumentation
High speed sampling systems
Window comparators
PCMCIA cards
Upgrade for MAX901 designs
GENERAL DESCRIPTION
The AD8564 is a quad 7 ns comparator with separate input and
output supplies, thus enabling the input stage to be operated
from ±5 V dual supplies or a 5 V single supply while maintaining a
CMOS-/TTL-compatible output.
Fast 7 ns propagation delay makes the AD8564 a good choice
for timing circuits and line receivers. Independent analog and
digital supplies provide excellent protection from supply pin
interaction. The AD8564 is pin compatible with the MAX901
and has lower supply currents.
Quad 7 ns
Single Supply Comparator
AD8564
PIN CONFIGURATIONS
–IN A
+IN A
GND
OUT A
OUT B
V–ANA
+IN B
–IN B
1 16
AD8564
89
–IN D
+IN D
V+ANA
OUT D
OUT C
V+DIG
+IN C
–IN C
Figure 1. 16-Lead TSSOP
(RU-16)
–IN A
+IN A
GND
OUT A
OUT B
V–ANA
+IN B
–IN B
–IN D
+IN D
V+ANA
OUT D
OUT C
V+DIG
+IN C
–IN C
AD8564
Figure 2. 16-Lead Narrow Body SOIC
(R-16)
–IN A 1
16 –IN D
+IN A 2
GND 3
OUT A 4
OUT B 5
V–ANA 6
+IN B 7
15 +IN D
+– –+
14 V+ANA
13 OUT D
AD8564
12 OUT C
11 V+DIG
+– –+
10 +IN C
–IN B 8
9 –IN C
Figure 3. 16-Lead PDIP
(N-16)
All four comparators have similar propagation delays. The
propagation delay for rising and falling signals is similar, and
tracks over temperature and voltage. These characteristics make
the AD8564 a good choice for high speed timing and data
communications circuits. For a similar single comparator with
latch function, refer to the AD8561 data sheet.
The AD8564 is specified over the industrial temperature range
(−40°C to +125°C). The quad AD8564 is available in the 16-lead
TSSOP, 16-lead narrow body SOIC, and 16-lead plastic DIP
packages.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1999–2007 Analog Devices, Inc. All rights reserved.
1 page  
AD8564
V+ANA = V+DIG = 5.0 V, V−ANA = −5 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
Input Offset Current
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
DIGITAL OUTPUTS
Logic 1 Voltage
Logic 0 Voltage
DYNAMIC PERFORMANCE2
Propagation Delay
Differential Propagation Delay (Rising Propagation Delay
vs. Falling Propagation Delay)
Rise Time
Fall Time
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current
Digital Supply Current
Analog Supply Current
Symbol Conditions
Min Typ Max Unit
VOS
ΔVOS/ΔT
IB
IOS
VCM
CMRR
AVO
CIN
−40°C ≤ TA ≤ +125°C1
VCM = 0 V
−40°C ≤ TA ≤ +125°C1
VCM = 0 V
0 V ≤ VCM ≤ 3.0 V
RL = 10 kΩ
2.3 7
10
4
±4
±9
±3
−4.9 +3.5
65 85
3000
3.0
mV
mV
μV/°C
μA
μA
μA
V
dB
V/V
pF
VOH IOH = –3.2 mA, ΔVIN > +250 mV
VOL IOL = 3.2 mA, ΔVIN > 250 mV
2.6 3.6
0.2
0.3
V
V
tP 200 mV step with 100 mV overdrive
−40°C ≤ TA ≤ +85°C1
100 mV step with 5 mV overdrive
ΔtP 100 mV step with 20 mV overdrive
20% to 80%
20% to 80%
6.75 9.8
8 13
8
0.5 2.0
3
3
ns
ns
ns
ns
ns
ns
PSRR
I+ANA
IDIG
I−ANA
4.5 V ≤ V+ANA and V+DIG ≤ 5.5 V
−40°C ≤ TA ≤ +85°C1
−40°C ≤ TA ≤ +125°C1
VO = 0 V, RL = ∞
−40°C ≤ TA ≤ +125°C1
−40°C ≤ TA ≤ +85°C1
−40°C ≤ TA ≤ +125°C1
50 70
dB
10.8 14.0 mA
15.6 mA
17 mA
3.6 4.4 mA
5.6 mA
−8.2 +14.0 mA
15.6 mA
17 mA
1 Full electrical specifications to −55°C, but these package types are guaranteed for operation from −40°C to +125°C only. Package reliability below −40°C is not guaranteed.
2 Guaranteed by design.
Rev. B | Page 4 of 12
5 Page 
AD8564
USING HYSTERESIS
Hysteresis can easily be added to a comparator through the
addition of positive feedback. Adding hysteresis to a comparator
offers an advantage in noisy environments where it is not desirable
for the output to toggle between states when the input signal is
near the switching threshold. Figure 17 shows a method for
configuring the AD8564 with hysteresis.
SIGNAL
COMPARATOR
VREF
R1
R2
CF
Figure 17. Configuring the AD8564 with Hysteresis
The input signal is connected directly to the inverting input of
the comparator. The output is fed back to the noninverting
input through R2 and R1. The ratio of R1 to R1 + R2 and the
output swing establishes the width of the hysteresis window,
with VREF setting the center of the window or the average
switching voltage. The output switches high when the input
voltage is greater than VHI and does not switch low again until
the input voltage is less than VLO, as given in Equation 2.
( )VHI = V+ − 1 − VREF
R1
R1 + R2
VREF
(1)
VLO
= VREF
⎜⎜⎝⎛1 −
R1 ⎟⎞
R1 + R2 ⎟⎠
(2)
where V+ is the positive supply voltage.
The CF capacitor may also be added to introduce a pole into
the feedback network. This has the effect of increasing the
amount of hysteresis at high frequencies. This can be useful
when comparing a relatively slow signal in a high frequency
noise environment.
At frequencies greater than
fP
= 1 , the hysteresis
2πCF R2
window approaches VHI = V+ – 1 V and VLO = 0 V.
At frequencies less than fP, the threshold voltages remain as it is
in Equation 1.
Rev. B | Page 10 of 12
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet AD8564.PDF ] | |
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