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PDF AD9050 Data sheet ( Hoja de datos )
| Número de pieza | AD9050 | |
| Descripción | 10-Bit/ 40 MSPS/60 MSPS A/D Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD9050 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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FEATURES
Low Power: 315 mW @ 40 MSPS, 345 mW @ 60 MSPS
On-Chip T/H, Reference
Single +5 V Power Supply Operation
Selectable 5 V or 3 V Logic I/O
SNR: 53 dB Minimum at 10 MHz w/40 MSPS
APPLICATIONS
Medical Imaging
Instrumentation
Digital Communications
Professional Video
10-Bit, 40 MSPS/60 MSPS
A/D Converter
AD9050
FUNCTIONAL BLOCK DIAGRAM
AINB
AIN
ENCODE
+5V GND
+5V
AD9050
T/H
TIMING
SUM
AMP
REFERENCE CKTS
ADC
DAC
ADC
DECODE
LOGIC
10
PRODUCT DESCRIPTION
The AD9050 is a complete 10-bit monolithic sampling analog-
to-digital converter (ADC) with an onboard track-and-hold and
reference. The unit is designed for low cost, high performance
applications and requires only +5 V and an encode clock to
achieve 40 MSPS or 60 MSPS sample rates with 10-bit resolution.
The encode clock is TTL compatible and the digital outputs
are CMOS; both can operate with 5 V/3 V logic, selected by the
user. The two-step architecture used in the AD9050 is opti-
mized to provide the best dynamic performance available while
maintaining low power consumption.
A 2.5 V reference is included onboard, or the user can provide
an external reference voltage for gain control or matching of
multiple devices. Fabricated on an advanced BiCMOS pro-
cess, the AD9050 is packaged in space saving surface mount
packages (SOIC, SSOP) and is specified over the industrial
(–40°C to +85°C) temperature range. The 60 MSPS version
(AD9050BRS-60) is only available in the SSOP package.
+5V
AIN
(+3.3V ± 0.512V)
+5V
0.1µF
0.1µF
0.1µF
3 4 2, 8, 11,
20, 22
10
5
AD9050
6
10 BITS
9
13
1, 7, 12,
21, 23
(2)
74AC574
ENCODE
Figure 1. Typical Connections
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
1 page  
AD9050
N
N+1
N+2
N+3
N+4
N+5
AIN
ENCODE
DIGITAL
OUTPUTS
tA
tEH tEL
tPD
N–5
N–4
N–3
N–2
N–1
N
MIN TYP
tA APERTURE DELAY
2.7ns
tEH PULSE WIDTH HIGH
10ns*
tEL PULSE WIDTH LOW
10ns*
tPD OUTPUT PROP DELAY 5.0ns 8.2ns
*FOR BR/BRS, SEE SPECIFICATION TABLE
MAX
166ns
166ns
15.0ns
Figure 2. Timing Diagram
AINB (Pin 9)
AIN (Pin 10)
VD
8k 8k
INPUT
BUFFER
16k 16k
Analog Input
VD
VDD (Pins 20, 22)
+3V to +5V
D0–D9, OR
ENCODE
(Pin 13)
VD
Output Stage
VD
Encode Input
VREFOUT
(Pin 3)
VREFIN
(Pin 4)
AV
VREFBF
(Pin 6)
VREF Output
Reference Circuit
Figure 3. Equivalent Circuits
REV. B
–5–
5 Page 
AD9050
U3
74AC574R
R5
1k
TP3
J2
R4
1k
U2
2
AD9631Q
C9
0.1µF
IN 6
R3 3 IN OUT
50
U6:B
74AC00R
46
5
J7
R1
50 3
OUT
4
VCC
Y1 GND
2
SW41
+5V
12 11
13
U1
AD9050R
3
4
5
6
9
10
13
14
TP1
C1
0.1µF
D9/MSB
VREFOUT
VREFIN
COMP
REFBP
AINB
AIN
ENC
OR
D8
D7
D6
D5
D4
D3
D2
D1
D0
+5V
+5V
15
16
17
18
19
24
25
26
27
28
20
22
C2
0.1µF
C3
0.1µF
TP2
E1 +5V
+5V
U6:A
74AC00R
13
2
9
8
7
8D
7D
6D
6 5D
5 4D
4 3D
3 2D
2 1D
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
12
13
14
15
16
17
18
19
CK
OE
11 1
U4
74AC574R
9
8
8D
7D
7 6D
6 5D
5 4D
4 3D
3 2D
2 1D
8Q 12
7Q 13
6Q 14
5Q 15
4Q 16
3Q 17
2Q 18
1Q 19
CK OE
11 1
J3
HDR20
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+5V
U6:D
74AC00R
J6
+5V
R2
2k
J1
C5 +
10µF
C7
0.1µF
+5V
+5V
9
10 8
U6:C
74AC00R
C10
0.1µF
C12
0.1µF
C13
0.1µF
C14
0.1µF
C15
0.1µF
C16
0.1µF
C17
0.1µF
C22
0.1µF
C23
0.1µF
C24
0.1µF
J5
C6
10µF +
C8
0.1µF
–5.2V
–5.2V
C20
0.1µF
Figure 24. Evaluation Board Schematic
REV. B
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD9050.PDF ] | |
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