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AD9221 데이터시트 PDF




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부품번호 AD9221 기능
기능 Monolithic A/D Converters
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AD9221 데이터시트, 핀배열, 회로
Complete 12-Bit 1.5/3.0/10.0 MSPS
Monolithic A/D Converters
AD9221/AD9223/AD9220
FEATURES
Monolithic 12-Bit A/D Converter Product Family
Family Members Are: AD9221, AD9223, and AD9220
Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS, and
10.0 MSPS
Low Power Dissipation: 59 mW, 100 mW, and 250 mW
Single 5 V Supply
Integral Nonlinearity Error: 0.5 LSB
Differential Nonlinearity Error: 0.3 LSB
Input Referred Noise: 0.09 LSB
Complete On-Chip Sample-and-Hold Amplifier and
Voltage Reference
Signal-to-Noise and Distortion Ratio: 70 dB
Spurious-Free Dynamic Range: 86 dB
Out-of-Range Indicator
Straight Binary Output Data
28-Lead SOIC and 28-Lead SSOP
GENERAL DESCRIPTION
The AD9221, AD9223, and AD9220 are a generation of high
performance, single supply 12-bit analog-to-digital converters.
Each device exhibits true 12-bit linearity and temperature drift
performance1 as well as 11.5-bit or better ac performance.2 The
AD9221/AD9223/AD9220 share the same interface options,
package, and pinout. Thus, the product family provides an upward
or downward component selection path based on performance,
sample rate and power. The devices differ with respect to their
specified sampling rate, and power consumption, which is reflected
in their dynamic performance over frequency.
The AD9221/AD9223/AD9220 combine a low cost, high speed
CMOS process and a novel architecture to achieve the resolution
and speed of existing hybrid and monolithic implementations at
a fraction of the power consumption and cost. Each device is a
complete, monolithic ADC with an on-chip, high performance,
low noise sample-and-hold amplifier and programmable voltage
reference. An external reference can also be chosen to suit the
dc accuracy and temperature drift requirements of the application.
The devices use a multistage differential pipelined architecture
with digital output error correction logic to provide 12-bit accu-
racy at the specified data rates and to guarantee no missing
codes over the full operating temperature range.
The input of the AD9221/AD9223/AD9220 is highly flexible,
allowing for easy interfacing to imaging, communications, medi-
cal, and data-acquisition systems. A truly differential input
structure allows for both single-ended and differential input
interfaces of varying input spans. The sample-and-hold
NOTES
1Excluding internal voltage reference.
2Depends on the analog input configuration.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
FUNCTIONAL BLOCK DIAGRAM
CLK
AVDD
DVDD
VINA
VINB
CAPT
CAPB
VREF
SENSE
SHA
MDAC1
GAIN = 16
MDAC2
GAIN = 8
MDAC3
GAIN = 4
5
A/D
4
A/D
3
A/D
54
3
DIGITAL CORRECTION LOGIC
12
OUTPUT BUFFERS
A/D
3
MODE
SELECT
1V
AD9221/AD9223/AD9220
REFCOM
AVSS
DVSS
CML
OTR
BIT 1
(MSB)
BIT 12
(LSB)
amplifier (SHA) is equally suited for both multiplexed sys-
tems that switch full-scale voltage levels in successive channels
as well as sampling single-channel inputs at frequencies up to
and beyond the Nyquist rate. Also, the AD9221/AD9223/AD9220
is well suited for communication systems employing Direct-
IF down conversion since the SHA in the differential input
mode can achieve excellent dynamic performance far beyond its
specified Nyquist frequency.2
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary
output format. An out-of-range (OTR) signal indicates an over-
flow condition that can be used with the most significant bit to
determine low or high overflow.
PRODUCT HIGHLIGHTS
The AD9221/AD9223/AD9220 family offers a complete single-
chip sampling 12-bit, analog-to-digital conversion function in
pin compatible 28-lead SOIC and SSOP packages.
Flexible Sampling Rates—The AD9221, AD9223, and AD9220
offer sampling rates of 1.5 MSPS, 3.0 MSPS, and 10.0 MSPS,
respectively.
Low Power and Single Supply—The AD9221, AD9223, and
AD9220 consume only 59 mW, 100 mW, and 250 mW, respec-
tively, on a single 5 V power supply.
Excellent DC Performance Over Temperature—The AD9221/
AD9223/AD9220 provide 12-bit linearity and temperature drift
performance.1
Excellent AC Performance and Low Noise—The AD9221/
AD9223/AD9220 provide better than 11.3 ENOB performance
and have an input referred noise of 0.09 LSB rms.2
Flexible Analog Input Range—The versatile on-board sample-
and-hold (SHA) can be configured for either single-ended or
differential inputs of varying input spans.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.




AD9221 pdf, 반도체, 판매, 대치품
AD9221/AD9223/AD9220
SWITCHING SPECIFICATIONS (TMIN to TMAX with AVDD = 5 V, DVDD = 5 V, CL = 20 pF)
Parameter
Symbol
AD9221
AD9223
AD9220
Clock Period*
CLOCK Pulsewidth High
CLOCK Pulsewidth Low
Output Delay
Pipeline Delay (Latency)
tC 667 333 100
tCH 300 150 45
tCL 300 150 45
tOD 8 8 8
13 13 13
19 19 19
333
*The clock period may be extended to 1 ms without degradation in specified performance @ 25 °C.
Specifications subject to change without notice.
Unit
ns min
ns min
ns min
ns min
ns typ
ns max
Clock Cycles
ANALOG
INPUT
INPUT
CLOCK
DATA
OUTPUT
S1 S2
tC
tCH tCL
S4
S3
Figure 1. Timing Diagram
tOD
DATA 1
ABSOLUTE MAXIMUM RATINGS*
Parameter
With
Respect
to Min
AVDD
AVSS
DVDD
DVSS
AVSS
DVSS
AVDD
DVDD
REFCOM
AVSS
CLK
AVSS
Digital Outputs
DVSS
VINA, VINB
AVSS
VREF
AVSS
SENSE
AVSS
CAPB, CAPT
AVSS
Junction Temperature
Storage Temperature
Lead Temperature
(10 sec)
–0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–65
Max
Unit
+6.5 V
+6.5 V
+0.3 V
+6.5 V
+0.3 V
AVDD + 0.3 V
DVDD + 0.3 V
AVDD + 0.3 V
AVDD + 0.3 V
AVDD + 0.3 V
AVDD + 0.3 V
150 °C
+150
°C
300 °C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may effect device reliability.
THERMAL CHARACTERISTICS
Thermal Resistance
28-Lead SOIC
JA = 71.4°C/W
JC = 23°C/W
28-Lead SSOP
JA = 63.3°C/W
JC = 23°C/W
Model
AD9221AR
AD9223AR
AD9220AR
AD9221ARS
AD9223ARS
AD9220ARS
AD9221-EB
AD9223-EB
AD9220-EB
ORDERING GUIDE
Temperature Package
Range
Description
Package
Option
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
28-Lead SOIC R-28
28-Lead SOIC R-28
28-Lead SOIC R-28
28-Lead SSOP RS-28
28-Lead SSOP RS-28
28-Lead SSOP RS-28
Evaluation Board
Evaluation Board
Evaluation Board
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD9221/AD9223/AD9220 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
–4– REV. E

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AD9221 전자부품, 판매, 대치품
AD9221/AD9223/AD9220
AD9223–Typical Performance Characteristics (AVDD = 5 V, DVDD = 5 V, fSAMPLE = 3.0 MSPS, TA = 25؇C)
1.0
0.8
0.6
0.4
0.2
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
0
CODE
4095
1.0
0.8
0.6
0.4
0.2
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
0
CODE
4095
8,123,672
96,830
N–1
130,323
N
CODE
N+1
TPC 10. Typical DNL
TPC 11. Typical INL
TPC 12. “Grounded-Input”
Histogram (Input Span = 2 V p-p)
80
75
70
65
60
55
50
45
40
0.1
–0.5dB
–6.0dB
–20.0dB
1.0
FREQUENCY – MHz
10.0
TPC 13. SINAD vs. Input Frequency
(Input Span = 2.0 V p-p, VCM = 2.5 V)
–50
–55
–60
–65
–70
–75
–80
–85
–90
–95
–100
0.1
–20.0dB
–0.5dB
–6.0dB
1.0
FREQUENCY – MHz
10.0
TPC 14. THD vs. Input Frequency
(Input Span = 2.0 V p-p, VCM = 2.5 V)
80
75 –0.5dB
70
65 –6.0dB
60
55
–20.0dB
50
45
40
0.1
1.0
FREQUENCY – MHz
10.0
TPC 15. SINAD vs. Input Frequency
(Input Span = 5.0 V p-p, VCM = 2.5 V)
–50
–55
–60
–65 –20.0dB
–70
–75 –6.0dB
–80
–0.5dB
–85
–90
–95
–100
0.1
1.0
FREQUENCY – MHz
10.0
TPC 16. THD vs. Input Frequency
(Input Span = 5.0 V p-p, VCM = 2.5 V)
–60
–65
–70
–75
5V p-p
–80
–85 2V p-p
–90
–95
–100
0.4
0.6 0.8 1
23
SAMPLE RATE – MSPS
4 56
TPC 17. THD vs. Sample Rate
(AIN = –0.5 dB, fIN = 500 kHz,
VCM = 2.5 V)
100
90
80
70
SFDR
60
50
SNR
40
30
20
10
–60 –50
–40 –30 –20
AIN – dBFS
–10
0
TPC 18. SNR/SFDR vs. AIN (Input
Amplitude) (fIN = 1.5 MHz, Input
Span = 2 V p-p, VCM = 2.5 V)
REV. E
–7–

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