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PDF AD9300 Data sheet ( Hoja de datos )
| Número de pieza | AD9300 | |
| Descripción | 4 x 1 Wideband Video Multiplexer | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
34 MHz Full Power Bandwidth
؎0.1 dB Gain Flatness to 8 MHz
72 dB Crosstalk Rejection @ 10 MHz
0.03؇/0.01% Differential Phase/Gain
Cascadable for Switch Matrices
MIL-STD-883 Compliant Versions Available
APPLICATIONS
Video Routing
Medical Imaging
Electro Optics
ECM Systems
Radar Systems
Data Acquisition
4 × 1 Wideband
Video Multiplexer
AD9300
FUNCTIONAL BLOCK DIAGRAM
(Based on Cerdip)
GENERAL DESCRIPTION
The AD9300 is a monolithic high speed video signal multiplexer
usable in a wide variety of applications.
Its four channels of video input signals can be randomly
switched at megahertz rates to the single output. In addition,
multiple devices can be configured in either parallel or cascade
arrangements to form switch matrices. This flexibility in using
the AD9300 is possible because the output of the device is in a
high-impedance state when the chip is not enabled; when the
chip is enabled, the unit acts as a buffer with a high input im-
pedance and low output impedance.
An advanced bipolar process provides fast, wideband switching
capabilities while maintaining crosstalk rejection of 72 dB at
10 MHz. Full power bandwidth is a minimum 27 MHz. The
device can be operated from ± 10 V to ± 15 V power supplies.
The AD9300K is available in a 16-pin ceramic DIP and a
20-pin PLCC and is designed to operate over the commercial
temperature range of 0°C to +70°C. The AD9300TQ is a
hermetic 16-pin ceramic DIP for military temperature range
(–55°C to +125°C) applications. This part is also available pro-
cessed to MIL-STD-883. The AD9300 is available in a 20-pin
LCC as the model AD9300TE, which operates over a tempera-
ture range of –55°C to +125°C.
The AD9300 Video Multiplexer is available in versions compli-
ant with MIL-STD-883. Refer to the Analog Devices Military
Products Databook or current AD9300/883B data sheet for de-
tailed specifications.
PIN DESIGNATIONS
DIP LCC and PLCC
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1996
1 page  
AD9300
THEORY OF OPERATION
Refer to the functional block diagram of the AD9300.
As shown in the drawing, this diagram is based on the pinouts of
the DIP packaging of the models AD9300KQ and AD9300TQ.
The AD9300KP and AD9300TE are packaged in 20-pin surface
mount packages. The extra pins are used for ground connections;
the theory of operation remains the same.
The AD9300 Video Multiplexer allows the user to connect any
one of four analog input channels (IN1–IN4) to the output of the
device and to switch between channels at megahertz rates.
The input channel, which is connected to the output is deter-
mined by a 2-bit TTL digital code applied to A0 and A1. The se-
lected input will not appear at the output unless a digital “1” is
also applied to the ENABLE input pin; unless the output is
enabled, it is a high impedance. Necessary combinations to ac-
complish channel selection are shown in the Logic Truth Table.
Figure 1. Input and Output Equivalent Circuits
Bipolar construction used in the AD9300 ensures that the input
impedance of the device remains high and will not vary with
power supply voltages. This characteristic makes the AD9300,
in effect, a switchable-input buffer. An onboard bias network
makes the performance of the AD9300 independent of applied
supply voltages, which can have any nominal value from
± 10 V dc to ± 15 V dc.
Although the primary application for the AD9300 is the routing
of video signals, the harmonic and dynamic attributes of the
device make it appropriate for other applications. The AD9300
has exceptional performance when switching video signals and
can also be used for switching other analog signals requiring
greater dynamic range and/or precision than those in video.
As shown in Figure 1, each analog input is connected to the
base of a bipolar transistor. If Channel 1 is selected, a current
switch is closed and routes current through the input transistor
for Channel 1.
If Channel 2 is then selected by the digital inputs, the current
switch for Channel 1 is opened and the current switch for Chan-
nel 2 is closed. This causes current to be routed away from the
Channel 1 transistor and into the Channel 2 input transistor.
Whenever a channel’s input device is carrying current, the ana-
log input applied to that channel is passed to the output stage.
The operation of the output stage is similar to that of the input
stages. Whenever the output stage is enabled with a HIGH digi-
tal “1” signal at the ENABLE pin, the output transistor will
carry current and pass the selected analog input.
When the output stage is disabled (by virtue of the ENABLE
pin being driven LOW with a digital “0”), the output current
switch is opened. This routes the current to other circuits within
the AD9300 that keep the output transistor biased “off.” These
circuits require approximately 1 µA of bias current from the load
connected to the output of the multiplexer. In the absence of a
terminating load and the resulting dc bias, the output of the
AD9300 “floats” at –2.5 V.
In summary, when the AD9300 is enabled by the ENABLE pin
being driven HIGH with a digital “1,” the selected analog input
channel acts as a buffer for the input and the output of the mul-
tiplexer is a low impedance. When the AD9300 is disabled with
a digital “0” LOW signal, the selected channel acts as an open
switch for the input, and the output of the unit becomes a high
impedance. This characteristic allows the user to wire-or several
AD9300 Analog Multiplexers together to form switch matrices.
REV. A
–5–
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| PDF Descargar | [ Datasheet AD9300.PDF ] | |
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