|
|
PDF AD7840 Data sheet ( Hoja de datos )
| Número de pieza | AD7840 | |
| Descripción | LC2MOS Complete 14-Bit DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD7840 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
a
FEATURES
Complete 14-Bit Voltage Output DAC
Parallel and Serial Interface Capability
80 dB Signal-to-Noise Ratio
Interfaces to High Speed DSP Processors
e.g., ADSP-2100, TMS32010, TMS32020
45 ns min WR Pulse Width
Low Power – 70 mW typ.
Operates from ؎5 V Supplies
LC2MOS
Complete 14-Bit DAC
AD7840
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The AD7840 is a fast, complete 14-bit voltage output D/A con-
verter. It consists of a 14-bit DAC, 3 V buried Zener reference,
DAC output amplifier and high speed control logic.
The part features double-buffered interface logic with a 14-bit
input latch and 14-bit DAC latch. Data is loaded to the input
latch in either of two modes, parallel or serial. This data is then
transferred to the DAC latch under control of an asynchronous
LDAC signal. A fast data setup time of 21 ns allows direct
parallel interfacing to digital signal processors and high speed
16-bit microprocessors. In the serial mode, the maximum serial
data clock rate can be as high as 6 MHz.
The analog output from the AD7840 provides a bipolar output
range of ± 3 V. The AD7840 is fully specified for dynamic per-
formance parameters such as signal-to-noise ratio and harmonic
distortion as well as for traditional dc specifications. Full power
output signals up to 20 kHz can be created.
The AD7840 is fabricated in linear compatible CMOS
(LC2MOS), an advanced, mixed technology process that com-
bines precision bipolar circuits with low power CMOS logic.
The part is available in a 24-pin plastic and hermetic
dual-in-line package (DIP) and is also packaged in a 28-termi-
nal plastic leaded chip carrier (PLCC).
PRODUCT HIGHLIGHTS
1. Complete 14-Bit D/A Function
The AD7840 provides the complete function for creating ac
signals and dc voltages to 14-bit accuracy. The part features
an on-chip reference, an output buffer amplifier and 14-bit
D/A converter.
2. Dynamic Specifications for DSP Users
In addition to traditional dc specifications, the AD7840 is
specified for ac parameters including signal-to-noise ratio and
harmonic distortion. These parameters along with important
timing parameters are tested on every device.
3. Fast, Versatile Microprocessor Interface
The AD7840 is capable of 14-bit parallel and serial interfac-
ing. In the parallel mode, data setup times of 21 ns and write
pulse widths of 45 ns make the AD7840 compatible with
modern 16-bit microprocessors and digital signal processors.
In the serial mode, the part features a high data transfer rate
of 6 MHz.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
DIP/SSOP
PIN CONFIGURATIONS
AD7840
PLCC
D/A SECTION
The AD7840 contains a 14-bit voltage mode D/A converter
consisting of highly stable thin film resistors and high speed
NMOS single-pole, double-throw switches. The simplified cir-
cuit diagram for the DAC section is shown in Figure 1. The
three MSBs of the data word are decoded to drive the seven
switches A–G. The 11 LSBs switch an 11-bit R-2R ladder struc-
ture. The output voltage from this converter has the same polar-
ity as the reference voltage, REF IN.
The REF IN voltage is internally buffered by a unity gain ampli-
fier before being applied to the D/A converter and the bipolar
bias circuitry. The D/A converter is configured and sealed for a
3 V reference and the device is tested with 3 V applied to REF
IN. Operating the AD7840 at reference voltages outside the
± 5% tolerance range may result in degraded performance from
the part.
for external use, it should he decoupled to AGND with a 200 Ω
resistor in series with a parallel combination of a 10 µF tantalum
capacitor and a 0.1 µF ceramic capacitor.
Figure 2. Internal Reference
Figure 1. DAC Ladder Structure
EXTERNAL REFERENCE
In some applications, the user may require a system reference or
some other external reference to drive the AD7840 reference in-
put. Figure 3 shows how the AD586 5 V reference can be con-
ditioned to provide the 3 V reference required by the AD7840
REF IN. An alternate source of reference voltage for the
AD7840 in systems which use both a DAC and an ADC is to
use the REF OUT voltage of ADCs such as the AD7870 and
AD7871. A circuit showing this arrangement is shown in
Figure 20.
INTERNAL REFERENCE
The AD7840 has an on-chip temperature compensated buried
Zener reference (see Figure 2) which is factory trimmed to 3 V
± 10 mV. The reference voltage is provided at the REF OUT
pin. This reference can be used to provide both the reference
voltage for the D/A converter and the bipolar bias circuitry. This
is achieved by connecting the REF OUT pin to the REF IN pin
of the device.
The reference voltage can also be used as a reference for other
components and is capable of providing up to 500 µA to an ex-
ternal load. The maximum recommended capacitance on REF
OUT for normal operation is 50 pF. If the reference is required
Figure 3. AD586 Driving AD7840 REF IN
REV. B
–5–
5 Page 
AD7840
AD7840–68000 Interface
An interface between the AD7840 and the 68000 microproces-
sor is shown in Figure 19. In this interface example, the LDAC
input is hardwired low. As a result the DAC latch and analog
output are updated on the rising edge of WR. A single move
instruction, therefore, loads the input latch and updates the output.
MOVE.W D0,$DAC
D0 = 68000 D0 Register
DAC = AD7840 Address
low so the update of the DAC latch and analog output takes
place on the sixteenth falling edge of SCLK (with SYNC low).
The FORMAT pin of the AD7840 must be tied to +5 V and
the JUSTIFY pin tied to DGND for this interface to operate
correctly.
Figure 19. AD7840–MC68000 Parallel Interface
Serial Interfacing
Figures 20 to 23 show the AD7840 configured for serial inter-
facing with the CS input hardwired to –5 V. The parallel bus is
not activated during serial communication with the AD7840.
AD7840–ADSP-2101/ADSP-2102 Serial Interface
Figure 20 shows a serial interface between the AD7840 and the
ADSP-2101/ADSP-2102 DSP processor. Also included in the
interface is the AD7870, a 12-bit A/D converter. An interface
such as this is suitable for modem and other applications which
have a DAC and an ADC in serial communication with a
microprocessor.
The interface uses just one of the two serial ports of the
ADSP-2101/ADSP-2102. Conversion is initiated on the
AD7870 at a fixed sample rate (e.g., 9.6 kHz) which is provided
by a timer or clock recovery circuitry. While communication
takes place between the ADC and the ADSP-2101/ ADSP-2102,
the AD7870 SSTRB line is low. This SSTRB line is used to
provide a frame synchronization pulse for the AD7840 SYNC
and ADSP-2101/ADSP-2102 TFS lines. This means that com-
munication between the processor and the AD7840 can only
take place while the AD7870 is communicating with the processor.
This arrangement is desirable in systems such as modems where
the DAC and ADC communication should be synchronous.
The use of the AD7870 SCLK for the AD7840 SCLK and
ADSP-2101/ADSP-2102 SCLK means that only one serial port
of the processor is used. The serial clock for the AD7870 must
be set for continuous clock for correct operation of this interface.
Data from the ADSP-2101/ADSP-2102 is valid on the falling
edge of SCLK. The LDAC input of the AD7840 is permanently
Figure 20. Complete DAC/ADC Serial Interface
AD7840–DSP56000 Serial Interface
A serial interface between the AD7840 and the DSP56000 is
shown in Figure 21. The DSP56000 is configured for normal
mode synchronous operation with gated clock. It is also set up
for a 16-bit word with SCK and SC2 as outputs and the FSL
control bit set to a 0. SCK is internally generated on the
DSP56000 and applied to the AD7840 SCLK input. Data from
the DSP56000 is valid on the falling edge of SCK. The SC2
output provides the framing pulse for valid data. This line must
be inverted before being applied to the SYNC input of the
AD7840.
The LDAC input of the AD7840 is connected to DGND so the
update of the DAC latch takes place on the sixteenth falling
edge of SCLK. As with the previous interface, the FORMAT
pin of the AD7840 must be tied to +5 V and the JUSTIFY pin
tied to DGND.
Figure 21. AD7840–DSP56000 Serial Interface
REV. B
–11–
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD7840.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD7840 | LC2MOS Complete 14-Bit DAC | Analog Devices |
| AD7841 | Octal 14-Bit/ Parallel Input/ Voltage-Output DAC | Analog Devices |
| AD7843 | Touch Screen Digitizer | Analog Devices |
| AD7845 | LC2MOS Complete 12-Bit Multiplying DAC | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |