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AD598 데이터시트 PDF




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부품번호 AD598 기능
기능 LVDT Signal Conditioner
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AD598 데이터시트, 핀배열, 회로
a
LVDT Signal
Conditioner
AD598
FEATURES
Single Chip Solution, Contains Internal Oscillator and
Voltage Reference
No Adjustments Required
Insensitive to Transducer Null Voltage
Insensitive to Primary to Secondary Phase Shifts
DC Output Proportional to Position
20 Hz to 20 kHz Frequency Range
Single or Dual Supply Operation
Unipolar or Bipolar Output
Will Operate a Remote LVDT at Up to 300 Feet
Position Output Can Drive Up to 1000 Feet of Cable
Will Also Interface to an RVDT
Outstanding Performance
Linearity: 0.05% of FS max
Output Voltage: ؎11 V min
Gain Drift: 50 ppm/؇C of FS max
Offset Drift: 50 ppm/؇C of FS max
PRODUCT DESCRIPTION
The AD598 is a complete, monolithic Linear Variable Differen-
tial Transformer (LVDT) signal conditioning subsystem. It is
used in conjunction with LVDTs to convert transducer mechan-
ical position to a unipolar or bipolar dc voltage with a high
degree of accuracy and repeatability. All circuit functions are
included on the chip. With the addition of a few external passive
components to set frequency and gain, the AD598 converts the
raw LVDT secondary output to a scaled dc signal. The device
can also be used with RVDT transducers.
The AD598 contains a low distortion sine wave oscillator to
drive the LVDT primary. The LVDT secondary output consists
of two sine waves that drive the AD598 directly. The AD598
operates upon the two signals, dividing their difference by their
sum, producing a scaled unipolar or bipolar dc output.
The AD598 uses a unique ratiometric architecture (patent pend-
ing) to eliminate several of the disadvantages associated with
traditional approaches to LVDT interfacing. The benefits of this
new circuit are: no adjustments are necessary, transformer null
voltage and primary to secondary phase shift does not affect sys-
tem accuracy, temperature stability is improved, and transducer
interchangeability is improved.
The AD598 is available in two performance grades:
Grade Temperature Range Package
AD598JR 0°C to +70°C
AD598AD –40°C to +85°C
20-Pin Small Outline (SOIC)
20-Pin Ceramic DIP
It is also available processed to MIL-STD-883B, for the military
range of –55°C to +125°C.
FUNCTIONAL BLOCK DIAGRAM
EXCITATION (CARRIER)
VA
11
32
OSC
AMP
17
LVDT
10
VB
AD598
A–B
A+B
FILTER AMP
16 VOUT
PRODUCT HIGHLIGHTS
1. The AD598 offers a monolithic solution to LVDT and
RVDT signal conditioning problems; few extra passive com-
ponents are required to complete the conversion from me-
chanical position to dc voltage and no adjustments are
required.
2. The AD598 can be used with many different types of
LVDTs because the circuit accommodates a wide range of
input and output voltages and frequencies; the AD598 can
drive an LVDT primary with up to 24 V rms and accept sec-
ondary input levels as low as 100 mV rms.
3. The 20 Hz to 20 kHz LVDT excitation frequency is deter-
mined by a single external capacitor. The AD598 input sig-
nal need not be synchronous with the LVDT primary drive.
This means that an external primary excitation, such as the
400 Hz power mains in aircraft, can be used.
4. The AD598 uses a ratiometric decoding scheme such that
primary to secondary phase shifts and transducer null voltage
have absolutely no effect on overall circuit performance.
5. Multiple LVDTs can be driven by a single AD598, either in
series or parallel as long as power dissipation limits are not
exceeded. The excitation output is thermally protected.
6. The AD598 may be used in telemetry applications or in hos-
tile environments where the interface electronics may be re-
mote from the LVDT. The AD598 can drive an LVDT at
the end of 300 feet of cable, since the circuit is not affected
by phase shifts or absolute signal magnitudes. The position
output can drive as much as 1000 feet of cable.
7. The AD598 may be used as a loop integrator in the design of
simple electromechanical servo loops.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703




AD598 pdf, 반도체, 판매, 대치품
AD598–Typical Characteristics (at +25؇C and VS = ؎15 V, unless otherwise noted)
40
OFFSET PSRR 12–15V
0
OFFSET PSRR 15–18V
–40
GAIN PSRR 12–15V
–80
120
80
40
20
–120
–160
GAIN PSRR 15–18V
0
–20
–200
–40
–240
–60
–60 –20 0 20
60 100 140
TEMPERATURE – °C
Figure 1. Gain and Offset PSRR vs. Temperature
5
–80
–60
–20 0 20
60 100
TEMPERATURE – °C
140
Figure 2. Typical Gain Drift vs. Temperature
20
0
OFFSET CMRR ± 3V
–5
10
–10
–15 0
–20
GAIN CMRR ± 3V
–25
–10
–30
–35
–60
–20 0 20
60
TEMPERATURE – °C
100
140
Figure 3. Gain and Offset CMRR vs. Temperature
–20
–60
–20 0 20
60
TEMPERATURE – °C
100
140
Figure 4. Typical Offset Drift vs. Temperature
THEORY OF OPERATION
A block diagram of the AD598 along with an LVDT (Linear
Variable Differential Transformer) connected to its input is
shown in Figure 5. The LVDT is an electromechanical trans-
ducer whose input is the mechanical displacement of a core and
whose output is a pair of ac voltages proportional to core posi-
tion. The transducer consists of a primary winding energized by
EXCITATION (CARRIER)
VA
11
32
OSC
AMP
17 AD598
LVDT
10
VB
A–B
A+B
FILTER AMP
16 VOUT
Figure 5. AD598 Functional Block Diagram
an external sine wave reference source, two secondary windings
connected in series, and the moveable core to couple flux be-
tween the primary and secondary windings.
The AD598 energizes the LVDT primary, senses the LVDT
secondary output voltages and produces a dc output voltage
proportional to core position. The AD598 consists of a sine
wave oscillator and power amplifier to drive the primary, a de-
coder which determines the ratio of the difference between the
LVDT secondary voltages divided by their sum, a filter and an
output amplifier.
The oscillator comprises a multivibrator which produces a
triwave output. The triwave drives a sine shaper, which pro-
duces a low distortion sine wave whose frequency is determined
by a single capacitor. Output frequency can range from 20 Hz to
20 kHz and amplitude from 2 V rms to 24 V rms. Total har-
monic distortion is typically –50 dB.
The output from the LVDT secondaries consists of a pair of
sine waves whose amplitude difference, (VA–VB), is proportional
to core position. Previous LVDT conditioners synchronously
detect this amplitude difference and convert its absolute value to
–4– REV. A

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AD598 전자부품, 판매, 대치품
AD598
8. C2, C3 and C4 are a function of the desired bandwidth of
the AD598 position measurement subsystem. They should
be nominally equal values.
C2 = C3 = C4 = 10–4 Farad Hz/fSUBSYSTEM (Hz)
If the desired system bandwidth is 250 Hz, then
C2 = C3 = C4 = 10–4 Farad Hz/250 Hz = 0.4 µF
See Figures 13, 14 and 15 for more information about
AD598 bandwidth and phase characterization.
9. In order to Compute R2, which sets the AD598 gain or full-
scale output range, several pieces of information are needed:
a. LVDT sensitivity, S
b. Full-scale core displacement, d
c. Ratio of manufacturer recommended primary drive level,
VPRI to (VA + VB) computed in Step 4.
LVDT sensitivity is listed in the LVDT manufacturer’s cata-
log and has units of millivolts output per volts input per inch
displacement. The E100 has a sensitivity of 2.4 mV/V/mil.
In the event that LVDT sensitivity is not given by the manu-
facturer, it can be computed. See section on Determining
LVDT Sensitivity.
For a full-scale displacement of d inches, voltage out of the
AD598 is computed as
VOUT
=
S
×
VPRI
(VA +VB )

× 500
µA ×
R2 ×
d.
VOUT is measured with respect to the signal reference,
Pin 17 shown in Figure 7.
Solving for R2,
R2 =
VOUT × (VA +VB )
S ×VPRI × 500 µA × d
(1)
Note that VPRI is the same signal level used in Step 4 to
determine (VA + VB).
For VOUT = 20 V full-scale range (± 10 V) and d = 0.2 inch
full-scale displacement (± 0.1 inch),
R2
=
2. 4
20 V
× 3×
× 2.70V
500 µA ×
0. 2
=
75. 3 k
VOUT as a function of displacement for the above example is
shown in Figure 9.
VOUT (VOLTS)
+10
–0.1
+0.1 d (INCHES)
–10
Figure 9. VOUT (±10 V Full Scale)
vs. Core Displacement (±0.1 Inch)
10. Selections of R3 and R4 permit a positive or negative output
voltage offset adjustment.
VOS
= 1.2V
×
R2
×

R
3
+
1
5
k*
R4
1
+ 5 k*

(2)
*These values have a ± 20% tolerance.
For no offset adjustment R3 and R4 should be open circuit.
To design a circuit producing a 0 V to +10 V output for a
displacement of ± 0.1 inch, set VOUT to +10 V, d = 0.2 inch
and solve Equation (1) for R2.
R2 = 37.6 k
This will produce a response shown in Figure 10.
VOUT (VOLTS)
+5
–0.1 +0.1 d (INCHES)
–5
Figure 10. VOUT (±5 V Full Scale)
vs. Core Displacement (±0.1 Inch)
In Equation (2) set VOS = 5 V and solve for R3 and R4.
Since a positive offset is desired, let R4 be open circuit.
Rearranging Equation (2) and solving for R3
R
3
=
1.2 × R2
VOS
5
k
=
4. 02
k
Figure 11 shows the desired response.
VOUT (VOLTS)
+10
+5
–0.1
+0.1 d (INCHES)
Figure 11. VOUT (0 V–10 V Full Scale)
vs. Displacement (±0.1 Inch)
DESIGN PROCEDURE
SINGLE SUPPLY OPERATION
Figure 12 shows the single supply connection method.
For single supply operation, repeat Steps 1 through 10 of the
design procedure for dual supply operation, then complete the
additional Steps 11 through 14 below. R5, R6 and C5 are addi-
tional component values to be determined. VOUT is measured
with respect to SIGNAL REFERENCE.
11. Compute a maximum value of R5 and R6 based upon the
relationship
R5 + R6 VPS/100 µA
12. The voltage drop across R5 must be greater than
2
+
10
k
*

R4
1. 2V
+ 5 k
Therefore
+
250
µA
+
VOUT
4 × R2

Volts
R5
2 +10
k*

1.2 V
R4 +5k
100
+ 250
µA
µA
+
V OUT
4 × R2

Ohms
*These values have ± 20% tolerance.
Based upon the constraints of R5 + R6 (Step 11) and R5
(Step 12), select an interim value of R6.
REV. A
–7–

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