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PDF AD6411 Data sheet ( Hoja de datos )
| Número de pieza | AD6411 | |
| Descripción | DECT RF Transceiver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD6411 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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FEATURES
Fully Compliant with DECT Specifications
Single IC DECT Radio
Integrated UHF VCO (External Resonator)
Integrated Synthesizer Supporting Extended Frequency
Allocation
Built-In Supply Regulation
Direct VCO Modulation for DECT Transmit Path
PLL-Based Demodulator
Use with Low Cost Plastic Packaged SAW Filters
Ultralow Power Design
Operates from +3.0 V to +5.5 V Battery
User-Selectable Power-Down Modes
Small 48-Lead LQFP Package
APPLICATIONS
DECT Cordless Telephones
DECT-Based Wireless Local Loop Systems
DECT-Based Wireless Data Systems
DECT RF Transceiver
AD6411
FUNCTIONAL BLOCK DIAGRAM
LNA
PA
PLL
DEMODULATOR
PLL
VCO
AD6411
PFD
CONTROL
INTERFACE
RX
DATA
RSSI
TX
DATA
DESCRIPTION
The AD6411 provides the complete transmit and receive RF
signal processing necessary to implement a digital wireless
transceiver based on the Digital Enhanced Cordless Telecom-
munications (DECT) standard.
The AD6411’s receive signal path consists of a mixer, IF ampli-
fiers and PLL demodulator. The low noise, high intercept mixer
is a development of the doubly-balanced Gilbert-Cell type. It
has a nominal –16 dBm input-referred 1 dB compression point
and a –8 dBm input referred third-order intercept. The limiter
amplifier provides sufficient gain to drive the PLL demodulator,
which provides selectable analog or sliced outputs. The RSSI
output provides a voltage proportional to the receive signal
strength. It measures nearly 100 dB IF signal strength range
with 14 mV/dB gain scaling.
The transmit path accepts baseband data, which is filtered and
applied to the VCO directly. The VCO operates at half the RF
carrier frequency, and is doubled to avoid pulling due to leakage
from the output.
An on-chip PLL frequency synthesizer provides channel selec-
tion. Operating modes are selected either through a serial bus or
asynchronous control pins. This allows compatibility with most
of the available DECT baseband controller ASICs.
The AD6411 is packaged in a 48-lead LQFP.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
1 page  
AD6411
VCC
L2
BPF1 LNA BPF2
VCC
S1
L1
PA
C1
SAW
C14
C13
LOAD
SYNTH
VCC
L3
C2 R2
R3 L4
TCI V1 C3
R1 C4
C5
+
REF
+
DC RESTORE
BSW
TXDATA
X2 0...31
32/33
32/34
12/16
PFD
REFERENCE
REGULATOR #1
AD6411
CONTROLLER
INTERFACE
REGULATOR #2
DMOD DATA
C6
SFS
R4 VREF
VBAT
C7
Q1
VBAT
C8
Q2
C10
R6
REF RSSI
C11 R5
C12
VBAT
C9
Figure 1. Functional Block Diagram
PRODUCT OVERVIEW
The AD6411 provides most of the active circuitry required to
realize a complete low power DECT transceiver.
Figure 1 shows the main sections of the AD6411. It consists, in
the receive path, of a UHF mixer and two-stage IF strip with
integrated demodulator and data slicer. The transmit path con-
sists of a VCO, frequency doubler and buffer amplifier.
Channel selection is performed by an on-chip PLL synthesizer.
All AD6411 operating modes can be controlled by parallel con-
trol inputs or the serial interface.
Receive Mixer
The UHF mixer is an improved Gilbert-cell design. The dy-
namic range at the input of the mixer is determined, at the up-
per end, by the maximum input signal level of –16 dBm in 50 Ω
at RFIN up to which the mixer remains linear and a valid RSSI
signal is provided and, at the lower end, by the noise level.
The local oscillator input of the receive mixer is internally pro-
vided by the LO, which is obtained by doubling the on-chip
VCO frequency.
The output of the mixer is single-ended. The nominal conver-
sion gain is specified for operation into a 110.592 MHz or
112.32 MHz SAW IF DECT bandpass filter. The power gain
of 17 dB is measured between the mixer input and the input of
this filter.
IF Circuits and Demodulator
Demodulation is achieved via a PLL. This is shown in detail in
Figure 2. An external manufacturing trim is required to achieve
the required level of frequency accuracy. The approach is to
adjust the capacitor TC1 (with the presence of an unmodulated
carrier) such that the dc level at Pin 3 (DEMOD_DATA) is
equal to the voltage on the external reference pin VREF.
Two demodulation modes are supported. In one mode any
frequency offset due to reference drift or frequency offsets on
the incoming carrier are propagated to the output (referred to as
“Normal” demodulation). The other method is to use a feature
of the DECT system that enables a secondary compensation
circuit to track out frequency offsets (“S-field sampling,” which
is enabled by the pin SFS—active high together with the con-
figuration bit SFM set over the serial interface).
REV. 0
–5–
5 Page 
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
48-Lead Plastic LQFP
(ST-48)
0.063 (1.60) MAX
0.020 (0.52)
0.019 (0.48)
SEATING
PLANE
0.362 (9.2)
0.346 (8.8) SQ
0.280 (7.10)
0.272 (6.90) SQ
48 37
1 36
TOP VIEW
(PINS DOWN)
0.217
(5.50)
BSC
SQ
0.006 (0.15)
0.002 (0.05)
0.006 (0.15) MAX
0.057 (1.45)
0.053 (1.35)
12 25
13 24
0.0197 (0.50)
TYP
0.011 (0.27)
0.006 (0.17)
AD6411
REV. 0
–11–
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet AD6411.PDF ] | |
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