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PDF AD647 Data sheet ( Hoja de datos )
| Número de pieza | AD647 | |
| Descripción | Ultralow Drift/ Dual BiFET Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Low Offset Voltage Drift
Matched Offset Voltage
Matched Offset Voltage Over Temperature
Matched Bias Currents
Crosstalk: –124 dB at 1 kHz
Low Bias Current: 35 pA max Warmed Up
Low Offset Voltage: 250 V max
Low Input Voltage Noise: 2 V p-p
High Open Loop Gain: 108 dB
Low Quiescent Current: 2.8 mA max
Low Total Harmonic Distortion
Standard Dual Amplifier Pinout
Available in Hermetic Metal Can Package, Hermetic
Surface Mount (20-Pin LCC) and Chip Form
MIL-STD-883B Processing Also Available
Single Version Available: AD547
Ultralow Drift,
Dual BiFET Op Amp
AD647
PRODUCT DESCRIPTION
The AD647 is an ultralow drift, dual JFET amplifier that com-
bines high performance and convenience in a single package.
The AD647 uses the most advanced ion-implantation and laser
wafer drift trimming technologies to achieve the highest perfor-
mance currently available in a dual JFET. Ion-implantation per-
mits the fabrication of matched JFETs on a monolithic bipolar
chip. Laser wafer drift trimming trims both the initial offset volt-
age and its drift with temperature to provide offsets as low as
100 µV (250 µV max) and drifts of 2.5 µV/°C max.
In addition to outstanding individual amplifier performance, the
AD647 offers guaranteed and tested matching performance on
critical parameters such as offset voltage, offset voltage drift and
bias currents.
The high level of performance makes the AD647 especially well
suited for high precision instrumentation amplifier applications
that previously would have required the costly selection and
matching of space wasting single amplifiers.
The AD647 is offered in four performance grades, three com-
mercial (the J, K and L) and one extended (the S). All are sup-
plied in hermetically sealed 8-pin TO-99 packages and are
available processed to MIL-STD-883B. The LCC version is
also available processed to MIL-STD-883B.
PRODUCT HIGHLIGHTS
1. The AD647 is guaranteed and tested to tight matching speci-
fications to ensure high performance and to eliminate the se-
lection and matching of single devices.
2. Laser wafer drift trimming reduces offset voltage and offset
voltage drifts to 250 µV and 2.5 µV/°C max.
3. Voltage noise is guaranteed at 4 µV p-p max (0.1 Hz to
10 Hz) on K, L and S grades.
4. Bias current (35 pA K, L, S; 75 pA J) is specified after five
minutes of operation.
5. Total supply current is a low 2.8 mA max.
6. High open loop gain ensures high linearity in precision instru-
mentation amplifier applications.
7. The standard dual amplifier pinout permits the direct substi-
tution of the AD647 for lower performance devices.
8. The AD647 is available in chip form.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
AD647
APPLICATION NOTES
The AD647 is fully specified under actual operating conditions
to insure high performance in any application, but there are some
steps that will improve on even this high level of performance.
The bias current of a JFET amplifier doubles with every 10°C
increase in junction temperature. Any heat source that can be
eliminated or minimized will significantly improve bias current
performance. To account for normal power dissipation, the larg-
est contributor to chip self-heating, the bias currents of the
AD647 are guaranteed fully warmed up with ± 15 V supplies. A
decrease in supply voltage will decrease power consumption,
resulting in a corresponding drop in bias currents.
Open loop gain and bias currents, to some extent, are affected
by output loading. In applications where high linearity is essen-
tial, load impedance should be kept as high as possible to mini-
mize degradation of open loop gain.
The outstanding ac and dc performance of the AD647 make it
an ideal choice for critical instrumentation applications. In such
applications, leakage paths, line losses and external noise
sources should be considered in the layout of printed circuit
boards. A guard ring surrounding the inputs and connected to a
low impedance potential (at the same level as the inputs) should
be placed on both sides of the circuit board. This will eliminate
leakage paths that could degrade bias current performance. All
signal paths should be shielded to minimize noise pickup.
THE AD647 USED WITH THE AD7546
Figure 24 shows the AD647 used with the AD7546 16-bit
segment DAC. In this application, amplifier performance is
critical to the overall performance of the AD7546. A1 is used as
a dual precision buffer. Here the offset voltage match, low offset
voltage and high open loop gain of the AD647 ensure monoto-
nicity and high linearity over the entire operating temperature
range. A2 serves a dual function amplifier A is a Track and
Hold circuit that deglitches the DAC output and amplifier B
acts as an output amplifier. The performance of the amplifiers
of A2 is crucial to the accuracy of the system. The errors of
these amplifiers are added to the errors due strictly to DAC im-
perfections. For this reason great care should be used in the se-
lection of these amplifiers. The matching characteristics, low
bias current and low temperature coefficients of the AD647
make it ideal for this application.
Figure 24. AD647 Used with AD7546 16-Bit DAC
Figure 23. AD647 Used as DAC Output Amplifier
USING THE AD647 IN LOG AMPLIFIER APPLICATIONS
Log amplifiers or log ratio amplifiers are useful in a wide range
of analog computational applications, ranging from the simple
linearization of exponential transducer outputs to the use of
logarithms in computations involving multi-term products or ar-
bitrary exponents. Log amps also facilitate the compression of
wide ranging analog input signals into a range that can be easily
handled using standard circuit techniques.
A CMOS DAC AMPLIFIER
The output impedance of a CMOS DAC, such as the AD7541,
varies with digital input code. This causes a corresponding
variation in the noise gain of the DAC-amplifier combination.
This noise gain modulation introduces a nonlinearity whose
magnitude is dependent on the amount of offset voltage present.
Laser wafer drift trimming lowers the initial offset voltage and
the offset voltage drift of the AD647, therefore minimizing the
effect of this nonlinearity and its drift with temperature. This, in
conjunction with the low bias current and high open loop gain,
makes the AD647 ideal for DAC output amplifier applications.
Figure 25. Log-Ratio Amplifier
REV. A
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| PDF Descargar | [ Datasheet AD647.PDF ] | |
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