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부품번호 AD7111A 기능
기능 LC2MOS LOGDAC Logarithmic D/A Converter
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AD7111A 데이터시트, 핀배열, 회로
a
FEATURES
Dynamic Range: 88.5 dB
Resolution: 0.375 dB
On-Chip Data Latches
+5 V Operation
AD7111A Pin Compatible with AD7524
Low Power
APPLICATIONS
Audio Attenuators
Sonar Systems
Function Generators
Digitally Controlled AGC System
LC2MOS LOGDAC
Logarithmic D/A Converter
AD7111/AD7111A
FUNCTIONAL BLOCK DIAGRAMS
VDD
VIN
AD7111
17-BIT DAC
RFB
I OUT
AGND
17-BIT LATCH
DECODE LOGIC
GENERAL DESCRIPTION
The LOGDAC® AD7111/AD7111A are monolithic multiplying
D/A converters featuring wide dynamic range in a small pack-
age. Both DACs can attenuate an analog input signal over the
range 0 dB to 88.5 dB in 0.375 dB steps. They are available in
16-pin DIPs and SOIC packages. The AD7111 is also available
in a 20-terminal LCCC package.
The degree of attenuation across the DAC is determined by an
8-bit word applied to the onboard decode logic. This 8-bit word
is decoded into a 17-bit word which is then applied to a 17-bit
R-2R ladder. The very fine step resolution, which is available
over the entire dynamic range, is due to the use of this 17-bit
DAC.
The AD7111/AD7111A are easily interfaced to a standard 8-bit
MPU bus via an 8-bit data port and standard microprocessor
control lines. The AD7111 WR input is edge triggered and re-
quires a rising edge to load new data to the DAC. The AD7111A
WR is level triggered to allow transparent operation of the
latches, if required. It should also be noted that the AD7111A is
exactly pin and function-compatible with the AD7524, an in-
dustry standard 8-bit multiplying DAC. This allows an easy up-
grading of existing AD7524 designs which would benefit both
from the wider dynamic range and the finer step resolution of-
fered by the AD7111A.
The AD7111/AD7111A are fabricated in Linear Compatible
CMOS (LC2MOS), an advanced, mixed technology process that
combines precision bipolar circuits with low power CMOS logic.
LOGDAC is a registered trademark of Analog Devices, Inc.
CONTROL LOGIC
8-BIT BUFFER
CS WR
VDD
VIN
D0 – D7
AD7111A
17-BIT DAC
DGND
RFB
I OUT
AGND
17-BIT LATCH
DECODE LOGIC
CONTROL LOGIC
8-BIT BUFFER
CS WR
D0 – D7
DGND
PRODUCT HIGHLIGHTS
1. Wide Dynamic Range: 0 dB to 88.5 dB attenuation range in
0.375 dB steps.
2. Small Package: The AD7111/AD7111A are available in
16-pin DIPs and SOIC packages.
3. Transparent Latch Operation: By tying the CS and WR in-
puts low, the DAC latches in the AD7111A can be made
transparent.
4. Fast Microprocessor Interface: Data setup times of 25 ns and
write pulse width of 57 ns make the AD7111A compatible
with modern microprocessors.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703




AD7111A pdf, 반도체, 판매, 대치품
AD7111/AD7111A
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VDD (to DGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
VIN (to AGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 35 V
Digital Input Voltage to DGND . . . . . –0.3 V to VDD + 0.3 V
IOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD
VRFB to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 35 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
Power Dissipation, DIP . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . . +300°C
Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature (Soldering)
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
Power Dissipation, LCCC . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 76°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . . +300°C
Operating Temperature Range
Commercial (K, L Versions) . . . . . . . . . . . . . 0°C to +70°C
Industrial (B, C Versions) . . . . . . . . . . . . . –40°C to +85°C
Extended (T, U Versions) . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7111/AD7111A features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDES
AD7111 ORDERING GUIDE
AD7111A ORDERING GUIDE
Model
Temperature
Range
AD7111ABN
AD7111ACN
AD7111ABR
AD7111ACR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
NOTE
1N = Plastic DIP; R = SOIC.
Specified
Accuracy
Range
0 dB to 60 dB
0 dB to 72 dB
0 dB to 60 dB
0 dB to 72 dB
Package
Option1
N-16
N-16
R-16
R-16
Modell
Temperature
Range
Specified
Accuracy
Range
Package
Option2
AD7111KN
0°C to +70°C 0 dB to 60 dB N-16
AD7111BQ
–40°C to +85°C 0 dB to 60 dB Q-16
AD7111LN
0°C to +70°C 0 dB to 72 dB N-16
AD7111CQ
–40°C to +85°C 0 dB to 72 dB Q-16
AD7111UQ/883B –55°C to +125°C 0 dB to 72 dB Q-16
AD7111TE/883B –55°C to +125°C 0 dB to 60 dB E-20A
NOTES
1To order MIL-STD-883B, Class B processed parts, add /883B to part number.
Contact local sales office for military data sheet and availability.
2N = Plastic DIP; Q = Cerdip; E = LCCC; R = SOIC.
TERMINOLOGY
RESOLUTION: Nominal change in attenuation when moving
between two adjacent codes.
MONOTONICITY: The device is monotonic if the analog out-
put decreases (or remains constant) as the digital code increases.
FEEDTHROUGH ERROR: That portion of the input signal
which reaches the output when all digital inputs are high. See
section on Applications.
OUTPUT LEAKAGE CURRENT: Current which appears on
the IOUT terminal with all digital inputs high.
TOTAL HARMONIC DISTORTION: A measure of the
harmonics introduced by the circuit when a pure sinusoid is
applied to the input. It is expressed as the harmonic energy
divided by the fundamental energy at the output.
ACCURACY: The difference (measured in dB) between the
ideal transfer function as listed in Table I and the actual transfer
function as measured with the device.
OUTPUT CAPACITANCE: Capacitance from IOUT to
ground.
DIGITAL-TO-ANALOG GLITCH IMPULSE: The amount
of charge injected from the digital inputs to the analog output
when the inputs change state. This is normally specified as the
area of the glitch in either pA-secs or nV-secs depending upon
whether the glitch is measured as a current or voltage signal.
Glitch impulse is measured with VIN = AGND.
PROPAGATION DELAY: This is a measure of the internal
delays of the circuit and is defined as the time from a digital in-
put change to the analog output current reaching 90% of its
final value.
–4– REV. 0

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AD7111A 전자부품, 판매, 대치품
AD7111/AD7111A
Another error arises from the output amplifier s input offset
voltage. The amplifier is operated with a fixed feedback resis-
tance, but the equivalent source impedance (the AD7111/
AD7111A output impedance) varies as a function of attenuation
level. This has the effect of varying thc “noise” gain of the
amplifier, thus creating a varying error due to amplifier offset
voltage. It is recommended that an amplifier with less than
50 µV of input offset be used (such as the AD OP07 in dc appli-
cations. Amplifiers with higher offset voltage may cause audible
“thumps” in ac applications due to dc output changes.
The AD7111/AD7111A accuracy is specified and tested using
only the internal feedback resistor. Any gain error (i.e., mis-
match of RFB to the R-2R ladder) that may exist in the
AD7111/AD7111A D/A converter circuit results in a constant
attenuation error over the whole range. The AD7111/AD7111A
accuracy is specified relative to 0 dB attenuation, hence “Gain”
trim resistors—R1 and R2 in Figure 1—can be used to adjust
VOUT = VIN precisely (i.e., 0 dB attenuation) with input code
00000000. The accuracy and monotonic range specifications of
the AD7111/AD7111A are not affected in any way by this gain
trim procedure. For the AD7111/AD7111A L/C/U grades, suit-
able values for R1 and R2 of Figure 1 are R1 = 500 , R2 =
180 ; for the K/B/T grades, suitable value are R1 = 1000 ,
R2 = 270 . For additional information on gain error the reader
is referred to the “CMOS DAC Application Guide,” available
from Analog Devices, Inc., Publication Number G872b–8–1/89.
Typical Performance Characteristics
6
VDD = +5V
5 TA = +25°C
VIN APPLIED TO ALL DATA INPUTS
CS = WR = 0V
4
3
2
1
0
01 2 34 5
INPUT VOLTAGE – Volts
Figure 6. Typical Supply Current vs. Logic Input Level
0.4
VDD = +5V
0.2 TA = +25°C
0.0
*
*
*
****
*
*
*
*
**
*
**
*
**
*
**
**
*
**
*
**
**
*
**
*
**
**
*
–0.2
–0.4
–0.6
0 3 6 9 12 15 18 21 24 27 30
ATTENUATION – dB
Figure 7. Typical Attenuation Error for 0.75 dB Steps
1.0
VDD = +5V
0.5
0.0
–0.5
TA = +85°C
TA = +25°C
–1.0
0
6 12 18 24 30 36 42 48 54 60 66 72 78 84
ATTENUATION – dB
Figure 8. Typical Attenuation Error for 3 dB Steps vs.
Temperature
Figure 9. Accuracy Specification for K/B/T Grade Devices
at TA = +25°C
REV. 0
–7–

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