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AD7112 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD7112은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 AD7112 기능
기능 LC2MOS LOGDAC Dual Logarithmic D/A Converter
제조업체 Analog Devices
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AD7112 데이터시트, 핀배열, 회로
a
FEATURES
Dynamic Range: 88.5 dB
Resolution: 0.375 dB
On-Chip Data Latches for Both DACs
Four-Quadrant Multiplication
+5 V Operation
Pin Compatible with AD7528
Low Power
APPLICATIONS
Audio Attenuators
Sonar Systems
Function Generators
LC2MOS LOGDAC
Dual Logarithmic D/A Converter
AD7112*
FUNCTIONAL BLOCK DIAGRAM
VDD
VIN A
AD7112
17-BIT DAC A
RFB A
OUT A
DB0
DB7
8-BIT
BUFFER
CONTROL
LOGIC
17-BIT LATCH
DECODE LOGIC
17-BIT1L7ATCH
17-BIT DAC B
RFB B
OUT B
GENERAL DESCRIPTION
The LOGDAC® AD7112 is a monolithic dual multiplying D/A
converter featuring wide dynamic range and excellent DAC-to-
DAC matching. Both DACs can attenuate an analog input sig-
nal over the range 0 dB to 88.5 dB in 0.375 dB steps. It is
available in skinny 0.3" wide 20-pin DIPs and in 20-terminal
surface mount packages.
The degree of attenuation in either channel is determined by the
8-bit word applied to the onboard decode logic. This 8-bit word
is decoded into a 17-bit word which is then loaded into one of
the 17-bit data latches, determined by DACA/DACB. The fine
step resolution over the entire dynamic range is due to the use of
these 17-bit DACs.
The AD7112 is easily interfaced to a standard 8-bit MPU bus
via an 8-bit data port and standard microprocessor control lines.
It should be noted that the AD7112 is exactly pin-compatible
with the AD7528, an industry standard dual 8-bit multiplying
DAC. This allows an easy upgrading of existing AD7528 de-
signs which would benefit both from the wider dynamic range
and the finer step resolution offered by the AD7112.
The AD7112 is fabricated in Linear Compatible CMOS
(LC2MOS), an advanced, mixed technology process that com-
bines precision bipolar circuits with low power CMOS logic.
*Protected by U.S. Patent No. 4521764.
LOGDAC is a registered trademark of Analog Devices, Inc.
DAC A/ CS WR VIN B
DAC B
DGND
AGND
PRODUCT HIGHLIGHTS
1. DAC-to-DAC Matching: Since both of the AD7112 DACs
are fabricated at the same time on the same chip, precise
matching and tracking between the two DACs is inherent.
2. Small Package: The AD7112 is available in a 20-pin DIP
and a 20-terminal SOIC package.
3. Fast Microprocessor Interface: The AD7112 has bus inter-
face timing compatible with all modern microprocessors.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703




AD7112 pdf, 반도체, 판매, 대치품
AD7112
ABSOLUTE MAXIMUM RATINGS*
VDD to AGND or DGND . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
AGND to DGND . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Digital Inputs to DGND . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
OUT A, OUT B to AGND . . . . . . . . . . . –0.3 V, VDD + 0.3 V
VIN A, VIN B to AGND . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
VRFB A, VRFB B to AGND . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
Operating Temperature Range
All Versions . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . –65°C to +150°C
Power Dissipation, DIP . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 102°C/W
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature (Soldering)
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability. Only
one Absolute Maximum Rating may be applied at any one time.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7112 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
TERMINOLOGY
RESOLUTION: Nominal change in attenuation when moving
between two adjacent codes.
MONOTONICITY: The device is monotonic if the analog out-
put decreases or remains constant as the wdigital code in-
creases.
FEEDTHROUGH ERROR: That portion of the input signal
which reaches the output when all digital inputs are high.
OUTPUT CAPACITANCE: Capacitance from OUT A or
OUT B to ground.
GAIN ERROR: Gain error results from a mismatch between
RFB (the feedback resistance) and the R-2R ladder resistance.
Its effect in a LOGDAC is to produce a constant additive at-
tenuation error in dB over the whole range of the DAC.
ACCURACY: The difference (measured in dB) between the
ideal transfer function as listed in Table I and the actual trans-
fer function as measured with the device.
DIGITAL-TO-ANALOG GLITCH IMPULSE: The amount
of charge injected from the digital inputs to the analog output
when the inputs change state. This is normally specified as the
area of the glitch in either pA-s or nV-s depending on whether
the glitch is measured as a current or voltage signal. Glitch im-
pulse is measured with VIN = AGND.
ORDERING INFORMATION
Model
Temperature
Range
AD7112BN
AD7112CN
AD7112BR
AD7112CR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
*N = Plastic DIP; R = SOIC.
Specified
Accuracy
Range
0 dB to 60 dB
0 dB to 72 dB
0 dB to 60 dB
0 dB to 72 dB
Package
Option*
N-20
N-20
R-20
R-20
PIN FUNCTION DESCRIPTION
Pin Mnemonic Description
1 AGND
2 OUT A
3 RFB A
4 VIN A
5 DGND
6 DAC A/
DAC B
7–14 DB7–DB0
15 CS
16 WR
17 VDD
18 VIN B
19 RFB B
20 OUT B
Analog Ground.
Current Output Terminal of DAC A.
Feedback Resistor for DAC A.
Reference Input to DAC A
Digital Ground.
Selects Which DAC Can Accept Data from
Input Port.
8 Data Inputs.
Chip Select Input, Active Low.
Write Input, Active Low.
Power Supply Input 5 V ± 5%.
Reference Input to DAC B.
Feedback Resistor for DAC B.
Current Output Terminal of DAC B.
PIN CONFIGURATION
DIP/SOIC
AGND 1
20 OUT B
OUT A 2
19 RFB B
RFB A 3
18 VIN B
VIN A 4
17 VDD
DGND 5 AD7112 16 WR
TOP VIEW
DAC A/DAC B 6 (Not to Scale) 15 CS
(MSB) DB7 7
14 DB0 (LSB)
DB6 8
13 DB1
DB5 9
12 DB2
DB4 10
11 DB3
–4– REV. 0

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AD7112 전자부품, 판매, 대치품
AD7112
Another error arises from the output amplifier’s input offset volt-
age. The amplifier is operated with a fixed feedback resistance,
but the equivalent source impedance (the AD7112 output im-
pedance) varies as a function of the attenuation level. This has
the effect of varying the noise gain of the amplifier thus creating
a varying error due to amplifier offset voltage. It is recom-
mended that an amplifier with less than 50 µV of input offset be
used (such as the AD712 or ADOP07) in dc applications. Am-
plifiers with a large input offset voltage may cause audible
thumps in audio applications due to dc output changes. The
AD7112 accuracy is specified and tested using only the internal
feedback resistor. Any gain error (i.e., mismatch of RFB to the
R–2R ladder) that may exist in the AD7112 D/A converter cir-
cuit results in a constant attenuation error over the whole range.
The AD7112 accuracy is specified relative to 0 dB attenuation,
hence gain trim resistors can be used to adjust VOUT = VIN pre-
cisely (i.e., 0 dB attenuation) with input code 00000000. For
further information on gain error refer to the “CMOS DAC Ap-
plication Guide” which is available from Analog Devices, Publi-
cation Number G872b-8-1/89.
TYPICAL PERFORMANCE CHARACTERISTICS
A1
100
90
0.8V
DATA CHANGE
FROM 00H TO 80H
10
0%
5V
5V
200ns
C1 = 0pF
C1 = 15pF
Figure 4. Response of AD7112 with AD712
A1
100
90
0.8V
DATA CHANGE
FROM 00H TO 80H
10
0%
5V
5V
200ns
C1 = 0pF
C1 = 15pF
Figure 5. Response of AD7112 with OP275
6
5 TA = +25°C
ALL DIGITAL INPUTS
TIED TOGETHER
4
3
2
1
0
0 12345
VIN – Volts
Figure 6. Supply Current vs. Logic Input Level
10
OP275
C1 = 0pF
0
OP275
C1 = 15pF
–10
AD712
C1 = 0pF
VDD = +5V
–20 TA = +25°C
DATA INPUT CODE = 0000 0000
VIN = 1V rms
AD712
C1 = 15pF
–30
104
105 106
FREQUENCY – Hz
107
Figure 7. Frequency Response with AD712 and OP275
REV. 0
–7–

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