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PDF AD7242 Data sheet ( Hoja de datos )
| Número de pieza | AD7242 | |
| Descripción | LC2MOS Dual/ Complete/ 12-Bit/14-Bit Serial DACs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Two 12-Bit/14-Bit DACs with Output Amplifiers
AD7242: 12-Bit Resolution
AD7244: 14-Bit Resolution
On-Chip Voltage Reference
Fast Settling Time
AD7242: 3 s to ؎1/2 LSB
AD7244: 4 s to ؎1/2 LSB
High Speed Serial Interface
Operates from ؎5 V Supplies
Specified Over –40؇C to +85؇C in Plastic Packages
Low Power – 130 mW typ
LC2MOS Dual, Complete,
12-Bit/14-Bit Serial DACs
AD7242/AD7244
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The AD7242/AD7244 is a fast, complete, dual 12-bit/14-bit
voltage output D/A converter. It consists of a 12-bit/14-bit
DAC, 3 V buried Zener reference, DAC output amplifiers and
high speed serial interface logic.
Interfacing to both DACs is serial, minimizing pin count and
allowing a small package size. Standard control signals allow
interfacing to most DSP processors and microcontrollers.
Asynchronous control of DAC updating for both DACs is made
possible with a separate LDAC input for each DAC.
The AD7242/AD7244 operates from ± 5 V power supplies,
providing an analog output range of ± 3 V. A REF OUT/REF
IN function allows the DACs to be driven from the on-chip 3 V
reference or from an external reference source.
The AD7242/AD7244 is fabricated in Linear Compatible
CMOS (LC2MOS), an advanced mixed technology process that
combines precision bipolar circuits with low power CMOS
logic. Both parts are available in a 24-pin, 0.3-inch wide, plastic
or hermetic dual-in-line package (DIP) and in a 28-pin, plastic
small outline (SOIC) package. The AD7242 and AD7244 are
available in the same pinout to allow easy upgrade from 12-bit
to 14-bit performance.
PRODUCT HIGHLIGHTS
1. Complete, Dual 12-Bit/14-Bit DACs
The AD7242/AD7244 provides the complete function for
generating voltages to 12-bit/14-bit resolution. The part
features an on-chip reference, output buffer amplifiers and
two 12-bit/14-bit D/A converters.
2. High Speed Serial Interface
The AD7242/AD7244 provides a high speed, easy-to-use,
serial interface allowing direct interfacing to DSP processors
and microcontrollers. A separate serial port is provided for
each DAC.
3. Small Package Size
The AD7242/AD7244 is available in a 24-pin DIP and a 28-
pin SOIC package offering considerable space saving over
comparable solutions.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1996
1 page  
DIP
Pin No.
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Mnemonic
LDACA
TFSA
DTA
TCLKA
DGND
TP1
VDD
AGND
VOUTB
VSS
TP2
REF INB
LDACB
TFSB
DTB
TCLKB
DGND
TP3
VDD
AGND
VOUTA
VSS
REF OUT
REF INA
AD7242/AD7244
AD7242/AD7244 PIN FUNCTION DESCRIPTION
Description
Load DAC, Logic Input. A new word is transferred into DAC Latch A from input Latch A on the fall-
ing edge of this signal. If LDACA is hard-wired low, data is transferred from input Latch A to DAC
Latch A on the sixteenth falling edge of TCLKA after TFSA goes low.
Transmit Frame Synchronization, Logic Input. This is a frame or synchronization signal for DACA
data with serial data expected after the falling edge of this signal.
Transmit Data, Logic Input. This is the data input which is used in conjunction with TFSA and
TCLKA to transfer serial data to input Latch A.
Transmit Clock, Logic Input. Serial data bits for DACA are latched on the falling edge of TCLKA
when TFSA is low.
Digital Ground. Both DGND pins for the device must be tied together at the device.
Test Pin 1. Used when testing the device. Do not connect anything to this pin.
Positive Power Supply, 5 V ± 5%. Both VDD pins for the device must be tied together at the device.
Analog Ground. Both AGND pins for the device must be tied together at the device.
Analog Output Voltage from DACB. This output comes from a buffer amplifier. The range is bipolar,
± 3 V with REF INB = +3 V.
Negative Power Supply, –5 V ± 5%. Both VSS pins for the device must be tied together at the device.
Test Pin 2. Used when testing the device. Do not connect anything to this pin.
DACB Voltage Reference Input. The voltage reference for DACB is applied to this pin. It is internally
buffered before being applied to DACB. The nominal reference voltage for correct operation of the
AD7242/AD7244 is 3 V.
Load DAC, Logic Input. A new word is transferred into DAC Latch B from input Latch B on the fall-
ing edge of this signal. If LDACB is hard-wired low, data is transferred from input Latch B to DAC
Latch B on the sixteenth falling edge of TCLKB after TFSB goes low.
Transmit Frame Synchronization, Logic Input. This is a frame or synchronization signal for DACB
data with serial data expected after the falling edge of this signal.
Transmit Data, Logic Input. This is the data input used in conjunction with TFSB and TCLKB to
transfer serial data to input Latch B.
Transmit Clock, Logic Input. Serial data bits for DACB are latched on the falling edge of TCLKB
when TFSB is low.
Digital Ground. Both DGND pins for the device must be tied together at the device.
Test Pin 3. Used when testing the device. Do not connect anything to this pin.
Positive Power Supply, 5 V ± 5%. Both VDD pins for the device must be tied together at the device.
Analog Ground. Both AGND pins for the device must be tied together at the device.
Analog Output Voltage from DACA. This output comes from a buffer amplifier. The range is bipolar,
± 3 V with REF INA = +3 V.
Negative Power Supply, –5 V ± 5%. Both VSS pins for the device must be tied together at the device.
Voltage Reference Output. To operate the DACs with this internal reference, REF OUT should be
connected to both REF INA and REF INB. The external load capability of the reference is 500 µA.
DACA Voltage Reference Input. The voltage reference for DACA is applied to this pin. It is internally
buffered before being applied to DACA. The nominal reference voltage for correct operation of the
AD7242/AD7244 is 3 V.
REV. A
–5–
5 Page 
AD7242/AD7244
APPLYING THE AD7242/AD7244
Good printed circuit board layout is as important as the overall
circuit design itself in achieving high speed converter perfor-
mance. The AD7242 works on an LSB size of 1.465 mV, while
the AD7244 works on an LSB size of 366 µV. Therefore, the
designer must be conscious of minimizing noise in both the
converter itself and in the surrounding circuitry. Switching
mode power supplies are not recommended as the switching
spikes can feed through to the on-chip amplifier. Other causes
of concern are ground loops and digital feedthrough from
microprocessors. These are factors that influence any high
performance converter, and a proper PCB layout that minimizes
these effects is essential for best performance.
LAYOUT HINTS
Ensure that the layout for the printed circuit board has separated
digital and analog lines as much as possible. Take care not to
run any digital track alongside an analog signal track. Establish a
single point analog ground (star ground) separate from the logic
system ground. Place this star ground as close as possible to the
AD7242/AD7244. Connect all analog grounds to this star
ground and also connect the AD7242/AD7244 DGND pins to
this ground. Do not connect any other digital grounds to this
analog ground point.
Low impedance analog and digital power supply common
returns are essential to low noise operation of high performance
converters. Therefore, the foil width for these tracks should be
kept as wide as possible. The use of ground planes minimizes
impedance paths and also guards the analog circuitry from
digital noise.
NOISE
Keep the signal leads on the VOUTA and VOUTB signals and the
signal return leads to AGND as short as possible to minimize
noise coupling. In applications where this is not possible, use a
shielded cable between the DAC outputs and their destination.
Reduce the ground circuit impedance as much as possible since
any potential difference in grounds between the DAC and its
destination device appears as an error voltage in series with the
DAC output.
REV. A
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD7242.PDF ] | |
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