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PDF AD7394 Data sheet ( Hoja de datos )
| Número de pieza | AD7394 | |
| Descripción | +3 V/ Dual/ Serial Input 12-/10-Bit DACs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
+3 V, Dual, Serial Input
12-/10-Bit DACs
AD7394/AD7395
FEATURES
Micropower: 100 A/DAC
0.1 A Typical Power Shutdown
Single-Supply +2.7 V to +5.5 V Operation
Compact 1.1 mm Height TSSOP-14 Package
AD7394/12-Bit Resolution
AD7395/10-Bit Resolution
Serial Interface with Schmitt Trigger Inputs
APPLICATIONS
Automotive Output Span Voltage
Portable Communications
Digitally Controlled Calibration
PC Peripherals
GENERAL DESCRIPTION
The AD7394/AD7395 family of dual, 12-/10-bit, voltage output
digital-to-analog converters is designed to operate from a single
+3 V supply. Built using a CBCMOS process, this monolithic
DAC offers the user low cost and ease of use in single-supply
+3 V systems. Operation is guaranteed over the supply voltage
range of +2.7 V to +5.5 V making this device ideal for battery
operated applications.
The full-scale output voltage is determined by the applied exter-
nal reference input voltage, VREF. The rail-to-rail VREF input
to VOUT outputs allows for a full-scale voltage set equal to the
positive supply VDD or any value in between.
A doubled-buffered serial data interface offers high speed,
microcontroller compatible inputs using serial-data-in (SDI),
clock (CLK) and load strobe (LDA + LDB) pins. A chip-select
(CS) pin simplifies connection of multiple DAC packages by
enabling the clock input when active low. Additionally, an RS
input sets the output to zero scale or to 1/2 scale based on the
logic level applied to the MSB pin. The power shutdown pin,
SHDN, reduces power dissipation to nanoamp current levels.
All digital inputs contain Schmitt-triggered logic levels to mini-
mize power dissipation and prevent false triggering on the clock
input.
Both parts are offered in the same pinout to allow users to select
the amount of resolution appropriate for their application with-
out circuit card redesign.
FUNCTIONAL BLOCK DIAGRAM
CS
CLK
EN
SDI
(DATA)
R
S
H
I
F
T
E
G
I
S
T
E
R
LDA
LDB
VDD VREF
R
D
A
C
E
G
I
S
A
T
E
R
D
PR
12
R
D
D
A
C
E
G
I
S
B
T
E
R
PR
DAC A
OP
AMP A
AD7394/AD7395
DAC B
OP
AMP B
VOUTA
VOUTB
DGND
MSB
RS
AGND
SHDN
The AD7394/AD7395 is specified over the extended industrial
(–40°C to +85°C) temperature range. Packages available in-
clude plastic DIP and low profile 1.75 mm height SO-14 surface
mount packages. The AD7395ARU is available for ultracompact
applications in a thin 1.1 mm TSSOP-14 package. For automotive
applications the AD7395AR is specified for operation over the
(–40°C to +125°C) temperature range.
1
VDD = 3V
0.8 VREF = 2.5V
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8 TA = –55؇C, +25؇C, +85؇C
SUPERIMPOSED
–1
0 500 1000 1500 2000 2500
CODE – Decimal
3000
3500
4000
Figure 1. Differential Nonlinearity Error vs. Code
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
1 page  
AD7394
AD7394/AD7395
Table II. AD7394 Serial Input Register Data Format, Data Is Loaded in MSB-First Format
MSB
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2
B1
D1
LSB
B0
D0
AD7395
Table III. AD7395 Serial Input Register Data Format, Data Is Loaded in MSB-First Format
MSB
LSB
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
ABSOLUTE MAXIMUM RATINGS*
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD
Logic Inputs to GND . . . . . . . . . . . . . . . . . . . . . –0.3 V, +8 V
VOUT to GND . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
IOUT Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . 50 mA
Package Power Dissipation . . . . . . . . . . . . . (TJ max – TA)/θJA
Thermal Resistance θJA
14-Lead Plastic DIP Package (N-14) . . . . . . . . . . 103°C/W
14-Lead SOIC Package (R-14) . . . . . . . . . . . . . . . 158°C/W
14-Lead Thin Shrink Surface Mount (RU-14) . . . 180°C/W
Maximum Junction Temperature (TJ max) . . . . . . . . . . 150°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
AD7395AR and AD7395AN Only . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature
␣ ␣ N-14 (Soldering, 10 sec) . . . . . . . . . . . . . . . . . . . . . .+300°C
␣ ␣ R-14 (Vapor Phase, 60 sec) . . . . . . . . . . . . . . . . . . . .+215°C
␣ ␣ RU-14 (Infrared, 15 sec) . . . . . . . . . . . . . . . . . . . . . .+224°C
*Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
Res
(LSB)
Temperature
Range
Package
Description
AD7394AN
AD7394AR
AD7395AN
AD7395AR
AD7395ARU
12
12
10
10
10
–40°C to +85°C
–40°C to +85°C
–40°C to +125°C
–40°C to +125°C
–40°C to +85°C
14-Lead P-DIP
14-Lead SOIC
14-Lead P-DIP
14-Lead SOIC
14-Lead Thin Shrink Small Outline Package (TSSOP)
The AD7394/AD7395 contains 709 transistors. The die size measures 70 mil × 99 mil.
Package
Options
N-14
R-14
N-14
R-14
RU-14
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7394/AD7395 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–5–
5 Page 
AD7394/AD7395
Table IV. Typical Microcontroller Interface Formats
MSB
BYTE 1
LSB MSB
BYTE 0
LSB
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
X X X X D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X X X X X X D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D11–D0: 12-bit AD7394 DAC data; D9–D0: 10-bit AD7395 DAC data; X = Don’t Care; The MSB of byte 1 is the first bit that is loaded into the SDI input.
generated by the microprocessor’s power-on RESET signal, by
an output from the microprocessor, or by an external resistor
and capacitor. RESET has a Schmitt trigger input which results
in a clean reset function when using external resistor/capacitor
generated pulses. See the Control-Logic Truth Table I.
POWER SHUTDOWN (SHDN)
Maximum power savings can be achieved by using the power
shutdown control function. This hardware activated feature is
controlled by the active low input SHDN pin. This pin has a
Schmitt trigger input which helps to desensitize it to slowly
changing inputs. By placing a logic low on this pin the internal
consumption of the device is reduced to nano amp levels, guar-
anteed to 1.5 µA maximum over the operating temperature
range. When the AD7394/AD7395 has been programmed into
the power shutdown state, the present DAC register data is
maintained as long as VDD remains greater than 2.7 V. Once a
wake-up command SHDN = 1 is given, the DAC voltage out-
puts will return to their previous values. It typically takes
80 microseconds for the output voltage to fully stabilize. In the
shutdown state the DAC output amplifier exhibits an open-
circuit with a nominal output resistance of 500 kΩ to ground. If
the power shutdown feature is not needed, then the user should
tie the SHDN pin to the VDD voltage thereby disabling this
function.
UNIPOLAR OUTPUT OPERATION
This is the basic mode of operation for the AD7394. As shown
in Figure 24, the AD7394 has been designed to drive loads as
low as 5 kΩ in parallel with 100 pF. The code table for this
operation is shown in Table V.
+2.7V TO +5.5V
R
0.01F
VREF
VDD
DAC A
EXT
REF
DAC B
5
C DIGITAL
0.1F 10F
75k⍀
VOUTA
100pF
75k⍀
VOUTB
100pF
DGND AGND
DIGITAL INTERFACE
CIRCUITRY OMITTED
FOR CLARITY.
Figure 24. AD7394 Unipolar Output Operation
Table V. Unipolar Code Table
Hexadecimal
Number
in DAC Register
FFF
801
800
7FF
000
Decimal
Number
in DAC Register
4095
2049
2048
2047
0
Output
Voltage (V)
[VREF = 2.5 V]
2.4994
1.2506
1.2500
1.2494
0
The circuit can be configured with an external reference plus
power supply, or powered from a single dedicated regulator or
reference depending on the application performance requirements.
BIPOLAR OUTPUT OPERATION
Although the AD7395 has been designed for single-supply op-
eration, the output can easily be configured for bipolar opera-
tion. A typical circuit is shown in Figure 25. This circuit uses a
clean regulated +5 V supply for power, which also provides the
circuit’s reference voltage. Since the AD7395 output span swings
from ground to very near +5 V, it is necessary to choose an
external amplifier with a common-mode input voltage range that
extends to its positive supply rail. The micropower consumption
OP196 has been designed just for this purpose and results in
only 50 microamps of maximum current consumption. Connec-
tion of the equally valued 470 kΩ resistors results in a differen-
tial amplifier mode of operation with a voltage gain of two,
which produces a circuit output span of ten volts, that is, –5 V to
+5 V. As the DAC is programmed from zero code 000H to mid-
scale 200H to full-scale 3FFH, the circuit output voltage VO is
set at –5 V, 0 V and +5 V (–1 LSB). The output voltage VO is
coded in offset binary according to Equation 4.
V OUT
=
D
512
– 1
×5
(4)
where D is the decimal code loaded in the AD7395 DAC regis-
ter. Note that the LSB step size is 10/1024 = 10 mV. This cir-
cuit has been optimized for micropower consumption including
the 470 kΩ gain setting resistors, which should have low tem-
perature coefficients to maintain accuracy and matching (prefer-
ably the same resistor material, such as metal film). If better
stability is required, the power supply could be substituted with
a precision reference voltage such as the low dropout REF195,
which can easily supply the circuit’s 262 microamps of current,
and still provide additional power for the load connected to
VOUT. The micropower REF195 is guaranteed to source 10 mA
REV. 0
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD7394.PDF ] | |
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