AD7450 Datasheet PDF - Analog Devices
| Part Number | AD7450 | |
| Description | Differential Input/ 1MSPS/ 12-Bit ADC in SO-8 and S0-8 | |
| Manufacturers | Analog Devices | |
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PRELIMINARY TECHNICAL DATA
a
Preliminary Technical Data
Differential Input, 1MSPS,
12-Bit ADC in µSO-8 and S0-8
AD7450
FEATURES
Fast Throughput Rate: 1MSPS
Specified for VDD of 3 V and 5 V
Low Power at max Throughput Rate:
3 mW typ at 833kSPS with 3 V Supplies
8 mW typ at 1MSPS with 5 V Supplies
Fully Differential Analog Input
Wide Input Bandwidth:
70dB SINAD at 300kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface - SPITM/QSPITM/
MicroWireTM/ DSP Compatible
Powerdown Mode: 1µA max
8 Pin µSOIC and SOIC Packages
APPLICATIONS
Transducer Interface
Battery Powered Systems
Data Acquisition Systems
Portable Instrumentation
Motor Control
Communications
GENERAL DESCRIPTION
The AD7450 is a 12-bit, high speed, low power, succes-
sive-approximation (SAR) analog-to-digital converter
featuring a fully differential analog input. It operates from
a single 3 V or 5 V power supply and features throughput
rates up to 833kSPS or 1MSPS respectively.
This part contains a low-noise, wide bandwidth, differen-
tial track and hold amplifier (T/H) which can handle
input frequencies in excess of 1MHz with the -3dB point
being 20MHz typically. The reference voltage for the
AD7450 is applied externally to the VREF pin and can be
varied from 100 mV to 2.5 V depending on the power
supply and to suit the application. The value of the refer-
ence voltage determines the common mode voltage range
of the part. With this truly differential input structure and
variable reference input, the user can select a variety of
input ranges and bias points.
The conversion process and data acquisition are controlled
using CS and the serial clock allowing the device to inter-
face with Microprocessors or DSPs. The input signals are
sampled on the falling edge of CS and the conversion is
also initiated at this point.
MicroWire is a trademark of National Semiconductor Corporation.
SPI and QSPI are trademarks of Motorola, Inc.
REV. PrJ 27/02/02
FUNCTIONAL BLOCK DIAGRAM
VDD
VIN+
VIN-
VREF
T/H
12-BIT SUCCESSIVE
APPROXIMATION
A DC
A D7450
CONTROL
LOGIC
SCLK
SDATA
CS
GND
The SAR architecture of this part ensures that there are
no pipeline delays.
The AD7450 uses advanced design techniques to achieve
very low power dissipation at high throughput rates.
PRODUCT HIGHLIGHTS
1.Operation with either 3 V or 5 V power supplies.
2.High Throughput with Low Power Consumption.
With a 3V supply, the AD7450 offers 3mW typ power
consumption for 833kSPS throughput.
3.Fully Differential Analog Input.
4.Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock,
allowing the power to be reduced as the conversion time
is reduced through the serial clock speed increase. This
part also features a shutdown mode to maximize power
efficiency at lower throughput rates.
5.Variable Voltage Reference Input.
6.No Pipeline Delay.
7.Accurate control of the sampling instant via a CS input
and once off conversion control.
8. ENOB > 8 bits typ with 100mV Reference.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
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PRELIMINARY TECHNICAL DATA
AD7450
PIN FUNCTION DESCRIPTION
Pin No. Pin Mnemonic
1 VREF
2 VIN+
3 VIN-
4 GND
5 CS
6 SDATA
7 SCLK
8 VDD
Function
Reference Input for the AD7450. An external reference must be applied to this input. For a
5 V power supply, the reference is 2.5 V (±1%) and for a 3 V power supply, the reference is
1.25 V (±1%) for specified performance. This pin should be decoupled to GND with a
capacitor of at least 0.1µF. See the ‘Reference Section’ for more details.
Positive Terminal for Differential Analog Input.
Negative Terminal for Differential Analog Input.
Analog Ground. Ground reference point for all circuitry on the AD7450. All analog input
signals and any external reference signal should be referred to this GND voltage.
Chip Select. Active low logic input. This input provides the dual function of initiating a
conversion on the AD7450 and framing the serial data transfer.
Serial Data. Logic Output. The conversion result from the AD7450 is provided on this
output as a serial data stream. The bits are clocked out on the falling edge of the SCLK
input. The data stream consists of four leading zeros followed by the 12 bits of conversion
data which are provided MSB first. The output coding is two’s complement.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.
This clock input is also used as the clock source for the AD7450's conversion process.
Power Supply Input. VDD is 3 V (±10%) or 5 V (±5%). This supply should be decoupled to
GND with a 0.1µF Capacitor and a 10µF Tantalum Capacitor.
PIN CONFIGURATION SOIC and µSOIC
VREF 1
VIN + 2
VIN - 3
GND 4
AD7450
TOP VIEW
(Not to Scale)
8 VDD
7 SCLK
6 S DATA
5 CS
REV. PrJ
–5–
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for AD7450 electronic component. |
| Information | Total 24 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Product Image and Detail view |  1. 12-Bit ADC ( Converter ) [ Learn More ] | |
| Download | [ AD7450.PDF Datasheet ] | |
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