PDF AD120T Data sheet ( Hoja de datos )

Número de pieza	AD120T
Descripción	3-Level / 258 Outputs TFT LCD Gate Driver
Fabricantes	AMIC Technology
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No Preview Available ! Preliminary AD120 3-Level / 258 Outputs TFT LCD Gate Driver Document Title 3-Level / 258 Outputs TFT LCD Gate Driver Revision History Rev. No. History 0.0 Initial issue Issue Date August 10, 2001 Remark Preliminary Important Notice: AMIC reserves the right to make changes to its products or to discontinue any integrated circuit product or service without notice. AMIC integrated circuit products are not designed, intended, authorized, or warranted to be suitable for use in life-support applications, devices or systems or other critical applications. Use of AMIC products in such applications is understood to be fully at the risk of the customer. PRELIMINARY (August, 2001, Version 0.0) AMIC Technology, Inc. 1 page AD120 Description Operation Output signals OUT0~OUT257 are used for control of the TFT gates of the LCD panel. A bi-directional shift register is implemented to sequentially output signals OUT0~OUT257. A clock pulse CP is applied to the bi-directional shift register and the direction of the register is controlled by R /L signal. When R /L is LOW and either starting signal ST1 or ST2 goes to HIGH, the shift register starts shifting from OUT0 to OUT257. The voltages of the corresponding outputs switch to VH, VL or VOFF depending on the starting signals as shown in the diagram. The outputs of the starting signals ST1X / ST2X switch accordingly after 256 CP pulses following start of the shift register which allows expansion of the outputs by cascading more devices. When R /L is HIGH and either starting signal ST1X or ST2X goes to HIGH, the shift register starts shifting from OUT257 to OUT0. The voltages of the corresponding outputs switch to VH, VL or VOFF depending on the starting signals as shown in the diagram. The outputs of the starting signals ST1/ST2 switch accordingly after 256 CP pulses following start of the shift register which allows expansion of the outputs by cascading more devices. 3-Level Output VH - VL = 40V(max.) VOFF - VL = 0~10V VH - VSS = 17~28V OUT VH Level VDD VSS VOFF VL PRELIMINARY (August, 2001, Version 0.0) 4 AMIC Technology, Inc 5 Page Timing Waveform AD120 0.5 x V DD CP tCPH 0.5 x V DD 1 tCPL 0.5 x V DD 2 0.5 x V DD 256 0.5 x V DD 257 0.5 x V DD ST1, Input ST2 STX1, Output STX2 OUT0~OUT257 0.5 x V DD tSU thd 0.5 x V DD tpd2 tpd2 80% 20% tpd1 50% tpd1 50% ------------------------------------------------------------------------------------------------------------------------------------------------------------------------ (OGW = H) 0.5 x VDD CP 0.5 x VDD 0.5 x VDD 0.5 x VDD 0.5 x VDD 0.5 x VDD tpd2 tpd2 OUT0~257 80% tpd2 80% 20% tpd2 tpd2 80% 20% VH VOFF VL tpd2 20% ------------------------------------------------------------------------------------------------------------------------------------------------------------------------ (OGW = L) 0.5 x VDD CP 0.5 x VDD 0.5 x VDD 0.5 x VDD 0.5 x VDD tpd2 OUT0~OUT257 20% tpd2 80% tpd2 20% tpd2 80% VH VOFF VL tpd2 20% PRELIMINARY (August, 2001, Version 0.0) 10 AMIC Technology, Inc 11 Page

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