AD20MSP415 Datasheet PDF - Analog Devices
| Part Number | AD20MSP415 | |
| Description | GSM/DCS1800/PCS1900 Baseband Processing Chipset | |
| Manufacturers | Analog Devices | |
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a
GSM/DCS1800/PCS1900
Baseband Processing Chipset
AD20msp415
FEATURES
Complete Baseband Processing Chipset Performs:
Speech Coding/Decoding (GSM 06.XX)
Channel Coding/Decoding (GSM 05.03)
Equalization with 16-State Viterbi, Soft Decision
All ADC and DAC Interface Functions
Includes All Radio, Auxiliary and Voice Interfaces
Support for GSM Data Services
Embedded 16-Bit Microcontroller
Embedded 16-Bit DSP
Integrated SIM and Keyboard Interface
Interface to AD6430 GSM RF Chipset
Interface to EFR Coprocessor
JTAG Boundary Scan
Layer 1 Software Provided with Chipset
Software Compatible with AD20msp410
Full Phase 2 Protocol Stack Software Available
Full Reference Design Available for
Baseband Section and Radio Section
Ultralow Power Design
2.7 V to 3.3 V Operating Voltage
Intelligent Power Management Features
XXX mW Power Dissipation in Talk Mode
XX mW Power Dissipation in Standby Mode
Two TQFP Devices, Occupying Less than 7.5 cm2
APPLICATIONS
GSM/DCS1800/PCS1900 Mobile Radios
GENERAL DESCRIPTION
The Analog Devices GSM Baseband Processing Chipset provides
a competitive solution for GSM based Mobile Radio Systems.
It is designed to be fully integrated, easy to use, and compat-
ible with a wide range of product solutions. Examples are
GSM900, DCS1800, PCS1900 handsets and PCMCIA data
cards. The AD20msp415 is the higher integrated successor of
the AD20msp410 chipset, which passed European GSM Type
Approval in June, 1996.
The chipset consists of two highly integrated, sub-micron, low
power CMOS components that perform the entire baseband
signal processing of the GSM handset. The system architecture
is designed to be easily integrated into current designs and form
the basis for next generation designs.
The chipset uses an operating supply voltage of 2.7 V to 3.3 V
which, coupled with the extensive power management features,
significantly reduces the drain on battery power and extends the
handsets talk time and standby time.
SYSTEM ARCHITECTURE
256K 16
ROM
128K 8
RAM
DISPLAY
2K 8
EEPROM
KEYPAD
AD20msp415
VOICEBAND/
BASEBAND
CODEC
AD6421
GSM
PROCESSOR
AD6422
RADIO
SIM
DATA
TERMINAL
ADAPTER
CHIPSET COMPONENTS
GSM Processor (GSMP)
The AD6422 combines application specific hardware, an em-
bedded 16-bit DSP and an embedded 16-bit microcontroller
(Hitachi H8/300H). It performs channel coding and decoding
and executes the protocol stack and user software. The DSP
implements full rate speech transcoding according to GSM
specifications, including Discontinuous Transmission (DTX)
and Comfort Noise Insertion (CNI). A high performance soft-
decision Viterbi equalizer is also implemented in software em-
bedded in the DSP. The embedded microcontroller executes
the Layer 1, 2, 3 and user MMI software. The required Layer 1
software is supplied with the chipset. To ensure minimum power
consumption, the GSMP has been designed to control all the
power-down functions of the other components in the handset.
Voiceband/Baseband Converter (VBC)
The AD6421 performs the voiceband and baseband analog-to-
digital and digital-to-analog conversions, interfacing the digital
sections of the chipset to the microphone, loudspeaker and radio
section. In addition, the VBC contains all the auxiliary convert-
ers for burst-ramping, AFC, AGC, battery and temperature
monitoring. The chipset interfaces directly with the radio and
supplies all the synthesizer and timing control signals required
to support two synthesizers and a variety of radio architectures
including the AD6450 GSM RF-Chipset.
Software
The required Layer 1 software is supplied with the chipset. In
addition, an object code license is available for Layers 2 and 3 of
the protocol stack.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
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AD20msp415
POWER DISSIPATION CONSIDERATIONS
In mobile applications, minimizing the power consumption of
all devices is critical to achieve longer standby and talk times. In
a GSM handset the baseband subsystem dominates the current
consumption of the phone in standby. The design of the GSMP
and VBC includes extensive features to reduce power consump-
tion and give standby times of up to 100 hours.
Both devices are specifically designed to operate from 2.7 V to
3.3 V, to enable three or four cell battery designs.
The GSMP incorporates intelligent power management, permit-
ting automatic control of power consumption in the Channel
Codec part of the GSMP and the peripheral circuitry. Data
processing modules are switched on only when they process
data, otherwise they are powered down. Additional control
signals are provided that enable the Layer 1 software to control
the external subsystems, such as the VBC, the radio and
memory components, so that their power is intelligently switched
by the GSMP.
In the VBC, the power-down functions are split separately
among receive, transmit and auxiliary circuits. This provides
optimal analog power performance when operating in different
modes.
INTERFACES
The chipset has eleven external interfaces (see Figure 5) that
have to be considered in the design of the complete mobile
radio.
• Analog Voice Interface to VBC
• Radio Interface to VBC and GSMP
• Digital SIM Card Interface to GSMP
• Digital Interface to the Keypad
• Digital Bus Interface from GSMP to Memory and Display
• Digital Audio Interface (DAI)
• Digital Interface to GSMP for Data Services
• Digital Interface from the GSMP to the EEPROM
• Digital Interface from GSMP to Accessories
• Digital Test Interface
• Digital Interface from GSMP to Optional EFR Coprocessor
Analog Voice Interface to VBC
The analog voice interface to the VBC is specified in the AD6421
data sheet. Several design examples are given for single-ended
or differential inputs or outputs. A voltage reference for biasing
the microphone signal is provided on the VBC. The analog
output of the VBC is capable of directly driving an earpiece with
an impedance of 32 Ω. For optional use of a separate external
microphone and power amplifier, a set of auxiliary input/output
signals are provided on the VBC.
Radio Interface to VBC and GSMP
The analog interface between the VBC and the radio subsystem
is specified in detail in the AD6421 data sheet. The digital inter-
face between the GSMP and the radio subsystem is specified in
detail in the AD6422 data sheet.
Digital SIM Card Interface to GSMP
The GSMP is designed to interface directly to the SIM. How-
ever, interface logic may be necessary to connect the 3 V chipset
to a 5 V SIM.
Digital Interface to Keypad
Keypad interface logic for up to 30 keys is provided on the
GSMP. This interface provides keyboard scan for six rows
and four columns. Additionally, an extra column can be imple-
mented by using the “ghost column” method.
Digital Bus Interface to Memory and Display
External RAM and ROM, as well as the display controller,
interface directly to the 21-bit address bus and 16-bit data bus
of the GSMP.
Interface to FLASH Memory
The large FLASH memory can contain all programs for the
embedded Control Processor of the GSMP. This includes the
complete GSM protocol software as well as the User Interface
Software. A total size of 8 Mbits is suggested, assuming a typical
size of User Interface and a GSM Phase 2 Software. Enhanced
features requiring larger memories are easily supported by the
large address space of the embedded Control Processor.
To support FLASH memory, the GSMP provides embedded
code to download the software into the FLASH memory via its
standard serial port.
Interface to SRAM
In addition to the FLASH memory, the Control Processor also
supports static RAM to store user-defined variables, typically
those used by the Protocol Stack or Application Layer. Standard
SRAMs interface directly to the address and data bus of the
GSMP.
Interface to Display Controller
This interface is achieved through the address and data buses
and associated read and write strobes, as well as a specific en-
able signal. One backlight pin with PWM control is provided by
the GSMP to control brightness of backlight.
Digital Audio Interface (DAI)
As required by the GSM specifications, a digital audio interface
is provided to allow certain tests of the audio section during type
approval. This interface is activated in one of the test modes. A
fully functional “DAI box” needed for the FTA process may be
obtained from Analog Devices upon request.
Digital Interface to GSMP for Data Services
The chipset uses a serial interface that is connected to an exter-
nal data terminal adapter as described in the AD6422 data
sheet.
Digital Interface from the GSMP to the EEPROM
The GSMP provides separate pins to interface directly to an
external serial EEPROM via a serial bus. This EEPROM is
typically used for storage of calibration or user variable param-
eters like:
• Handset Identifier (IMEI)
• Language
• Keypad Lock
• DTMF ON/OFF
• Radio Calibration Parameters
A typical size of the EEPROM is 2K × 8 bits, but this depends
on the individual design of the handset.
REV. 0
–5–
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