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AD2S105 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD2S105은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 AD2S105 기능
기능 Three-Phase Current Conditioner
제조업체 Analog Devices
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AD2S105 데이터시트, 핀배열, 회로
a
FEATURES
Current Conditioning
Complete Vector Transformation on Silicon
Three-Phase 120° and Orthogonal 90° Signal
Transformation
Three-Phase Balance Diagnostic–Homopolar Output
DQ Manipulation
Real-Time Filtering
APPLICATIONS
AC Induction Motor Control
Spindle Drive Control
Pump Drive Control
Compressor Drive Control and Diagnostics
Harmonic Measurement
Frequency Analysis
Three-Phase Power Measurement
Three-Phase
Current Conditioner
AD2S105
FUNCTIONAL BLOCK DIAGRAM
Cosθ Sinθ
INPUT
DATA
STROBE
φ POSITION
PARALLEL
DATA
12 BITS
IS1
Cosθ
Cos (θ + 120°) IS2
IS3
Cos (θ + 240°)
Sinθ
Vds
SECTOR
MULTIPLIER
SINE AND
COSINE
MULTIPLIER
3φ-2φ
Vqs
SECTOR
MULTIPLIER
SINE AND
COSINE
MULTIPLIER
Vds'
Vqs'
BUSY
Cos θ + φ
Sin θ + φ
CONV1
CONV2
DECODE
Ia + Ib + Ic
3
HOMOPOLAR HOMOPOLAR +5V GND –5V
OUTPUT
REFERENCE
GENERAL DESCRIPTION
The AD2S105 performs the vector rotation of three-phase 120
degree or two-phase 90 degree sine and cosine signals by trans-
ferring these inputs into a new reference frame which is controlled
by the digital input angle φ. Two transforms are included in the
AD2S105. The first is the Clarke transform which computes
the sine and cosine orthogonal components of a three-phase in-
put. These signals represent real and imaginary components
which then form the input to the Park transform. The Park
transform relates the angle of the input signals to a reference
frame controlled by the digital input port. The digital input
port on the AD2S105 is a 12-bit/parallel natural binary port.
If the input signals are represented by Vds and Vqs, respectively,
where Vds and Vqs are the real and imaginary components, then
the transformation can be described as follows:
Vds' = Vds Cosφ – Vqs Sinφ
Vqs' = Vds Sinφ + Vqs Cosφ
Where Vds' and Vqs' are the output of the Park transform
and Sinφ, and Cosφ are the trigonometric values internally cal-
culated by the AD2S105 from the binary digital data φ.
The input section of the device can be configured to accept
either three-phase inputs, two-phase inputs of a three-phase
system, or two 90 degree input signals. The homopolar output
indicates an imbalance of a three-phase input only at a user-
specified level.
The digital input section will accept a resolution of up to 12 bits.
An input data strobe signal is required to synchronize the position
data and load this information into the device counters.
A two-phase rotated output facilitates the implementation of
multiple rotation blocks.
The AD2S105 is fabricated on LC2MOS and operates on
± 5 volt power supplies.
PRODUCT HIGHLIGHTS
Current Conditioning
The AD2S105 transforms the analog stator current signals (Is1,
Is2, Is3) using the digital angular signal (reference frame) into dc
values which represent direct current (Ids) and quadrature cur-
rent (Iqs). This transformation of the ac signals into dc values
simplifies the design of the analog-to-digital (A/D) conversion
scheme. The A/D conversion scheme is simplified as the band-
width sampling issues inherent in ac signal processing are
avoided and in most drive designs, simultaneous sampling of the
stator currents may not be necessary.
Hardware Peripheral for Standard Microcontroller and DSP
Systems
The AD2S105 off-loads the time consuming Cartesian transfor-
mations from digital processors and benchmarks show a signifi-
cant speed improvement over single processor designs. AD2S105
transformation time = 2 µs.
Field Oriented Control of AC Motors
The AD2S105 accommodates all the necessary functions to pro-
vide a hardware solution for current conditioning in variable
speed control of ac synchronous and asynchronous motors.
Three-Phase Imbalance Detection
The AD2S105 can be used to sense imbalances in a three-phase
system via the homopolar output.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703




AD2S105 pdf, 반도체, 판매, 대치품
AD2S105
PIN DESIGNATIONS1, 2, 3
Pin
Mnemonic
Description
3
4
5
6
7
10
11
12
13
14
15
16
17
19
20
21
22
23
24
25
26
27–38
41
42
44
STROBE
VDD
VSS
PH/OP4
PH/OP1
AGND
PH/IP4
PH/IPH3
PH/IP3
PH/IPH2
PH/IP2
PH/IPH1
PH/IP1
VSS
HPREF
HPOP
HPFILT
CONV1
CONV2
COS
SIN
DB12 to DB1
VDD
DGND
BUSY
Begin Conversion
Positive Power Supply
Negative Power Supply
Sin (θ + φ)
Cos (θ + φ)
Analog Ground
Sin θ Input
High Level Cos
(θ + 240°) Input
Cos (θ + 240°) Input
High Level Cos
(θ + 120°) Input
Cos (θ + 120°) Input
High Level Cos θ Input
Cos (θ) Input
Negative Power Supply
Homopolar Reference
Homopolar Output
Homopolar Filter
Select Analog Input
Format
Select Analog Input
Format
Cos Output
Sin Output
(DB1 = MSB, DB12 =
LSB Parallel Input Data)
Positive Power Supply
Digital Ground
Internal Logic Setup
Time
NOTES
190° orthogonal signals = Sin θ, Cos θ (Resolver) = PH/IP4 and PH/IP1.
2Three phase, 120°, three-wire signals = Cos θ, Cos (θ + 120°), Cos (θ + 240°).
= PH/IP1, PH/IP2, PH/IP3
High Level = PH/IPH1, PH/IPH2, PH/IPH3.
3Three Phase, 120°, two-wire signals = Cos (θ + 120°), Cos (θ + 240°) =
PH/IP2, PH/IP3.
In all cases where any of the input Pins 11 through 17 are not used, they must
be left unconnected.
PIN CONFIGURATION
6 5 4 3 2 1 44 43 42 41 40
PH/OP1 7
NC 8
NC 9
AGND 10
PH/IP4 11
PH/IPH3 12
PH/IP3 13
PH/IPH2 14
PH/IP2 15
PH/IPH1 16
PH/IP1 17
AD2S105
TOP VIEW
(NOT TO SCALE)
39 NC
38 DB1
37 DB2
36 DB3
35 DB4
34 DB5
33 DB6
32 DB7
31 DB8
30 DB9
29 DB10
18 19 20 21 22 23 24 25 26 27 28
NC = NO CONNECT.
–4– REV. 0

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AD2S105 전자부품, 판매, 대치품
AD2S105
Output Analog Signals
There are two sets of analog output from the AD2S105.
Sin/Cos orthogonal output signals are derived from the Clark/
three-to-two-phase conversion before the Park angle rotation.
These signals are available on Pin 25 (Cos ) and Pin 26 (Sin
), and occur before Park angle rotation.
Two-Phase (Sin (+ ), Cos (+ )) Signals
These represent the output of the coordinate transformation.
These signals are available on Pin 6 (PH/OP4, Sin (+ )) and
Pin 7 (PH/OP1, Cos (+ )).
HOMOPOLAR OUTPUT
HOMOPOLAR Reference
In a three-phase ac system, the sum of the three inputs to the
converter can be used to indicate whether or not the phases are
balanced.
If VSUM = PH/IP1 + PH/IP2 + PH/IP3 (or PH/IPH1 + PH/
IPH2 + PH/IPH3) this can be rewritten as VSUM = [Cos, +
Cos (+ 120°) + Cos (+ 240°)] = 0. Any imbalances in the
line will cause the sum VSUM 0. The AD2S105 homopolar
output (HPOP) goes high when VSUM > 3 × Vts. The voltage
level at which the HPOP indicates an imbalance is determined
by the HPREF threshold, Vts. This is set internally at ± 0.5 V dc
(± 0.1 V dc). The HPOP goes high when
V ts
<
(Cosθ
+
Cos(θ
+ 120° ) +
3
Cos(θ
+ 240° ))
×V
where V is the nominal input voltage.
With no external components VSUM must exceed ± 1.5 V dc in
order for HPOP to indicate an imbalance. The sensitivity of the
threshold can be reduced by connecting an external resistor be-
tween HPOP and ground in Figure 5 where
REXT is in .
V ts
=
0. 5
REXT
REXT
+ 20,000
HOMOPOLAR
REFERENCE
25µA
TO TRIGGER
Example: From the equivalent circuit, it can be seen that the in-
clusion of a 20 kresistor will reduce Vts to ± 0.25 V dc. This
corresponds to an imbalance of ± 0.75 V dc in the inputs.
Homopolar Filtering
The equation VSUM = Cos+ Cos (+ 120°) + Cos (+ 240°)
= 0 denotes an imbalance when VSUM 0. There are conditions,
however, when an actual imbalance will occur and the condi-
tions as defined by VSUM will be valid. For example, if the first
phase was open circuit when = 90° or 270°, the first phase is
valid at 0 V dc. VSUM is valid, therefore, when Cosis close to 0.
In order to detect an imbalance has to move away from 90° or
270°, i.e., when on a balanced line Cos 0.
Line imbalance is detected as a function of HPREF, either set
by the user or internally set at ± 0.5 V dc. This corresponds to a
dead zone when = 90° or 270° ± 30°, i.e., VSUM = 0, and,
therefore, no indicated imbalance. If an external 20 kresistor
is added, this halves Vts and reduces the zone to ± 15°. Note this
example only applies if the first phase is detached.
In order to prevent this false triggering an external capacitor
needs to be placed from HPFILT to ground, as shown in Figure
5. This averages out the perceived imbalance over a complete
cycle and will prevent the HPOP from alternatively indicating
balance and imbalance over = 0° to 360°.
For
dθ = 1000 rpm
dt
CEXT
= 220 nF
dθ
dt
= 100
rpm
CEXT
= 2.2 µF
Note: The slower the input rotational speed, the larger the time
constant required over which to average the HPOP output. Use
of the homopolar output at slow rotational speeds becomes im-
practical with respect to the increased value for CEXT.
34
DGND
1
AD2S105
TOP VIEW
23
HPFILT
HPOP
HPREF
CEXT
220nF
HPOP
HPREF
EXTERNAL
RESISTOR
20k
Figure 5. The Equivalent Homopolar Reference Input
Circuitry
12 REXT
GND
Figure 6. AD2S105 Homopolar Output Connections
REV. 0
–7–

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