|
|
|
부품번호 | A62S7316V-55SI 기능 |
|
|
기능 | 128K X 16 BIT LOW VOLTAGE CMOS SRAM | ||
제조업체 | AMIC Technology | ||
로고 | |||
A62S7316 Series
Preliminary
128K X 16 BIT LOW VOLTAGE CMOS SRAM
Document Title
128K X 16 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No.
0.0
0.1
0.2
History
Initial issue
Modify VCCmax from 3.3V to 3.6V
Add 55ns grade spec. for VCC = 3.0V to 3.6V
Issue Date
November 24, 1999
December 20, 2000
March 23, 2001
Remark
Preliminary
PRELIMINARY (March, 2001, Version 0.2)
AMIC Technology, Inc.
Pin Description - TSOP
Pin No.
Symbol
1 - 5, 18 - 22,
24 - 27,42 - 44
A0 - A16
6 CE
7 - 10, 13 - 16,
29 - 32, 35 - 38
I/O0 - I/O15
17 WE
39 LB
40 HB
41 OE
11, 33
VCC
12, 34
GND
23, 28
NC
Description
Address Inputs
Chip Enable Input
Data Input/Outputs
Write Enable Input
Byte Enable Input (I/O0 to I/O7)
Byte Enable Input (I/O8 to I/O15)
Output Enable Input
Power
Ground
No Connection
Recommended DC Operating Conditions
(TA = 0°C to + 70°C or -25°C to 85°C)
Symbol
Parameter
VCC
Supply Voltage
GND
Ground
VIH Input High Voltage
VIL Input Low Voltage
CL Output Load
TTL Output Load
Min.
2.7
0
2.4
-0.3
-
-
Typ.
3.0
0
-
-
-
-
A62S7316 Series
Max.
3.6
0
VCC + 0.3
+0.6
30
1
Unit
V
V
V
V
pF
-
PRELIMINARY (March, 2001, Version 0.2)
3
AMIC Technology, Inc.
4페이지 A62S7316 Series
AC Characteristics (TA = 0°C to +70°C or -25°C to 85°C, VCC = 2.7V to 3.6V)
Symbol
Parameter
A62S7316-55S/SI
A62S7316-70S/SI
(VCC = 3.0V to 3.6V) (VCC = 2.7V to 3.6V)
Unit
Min.
Max.
Min.
Max.
Read Cycle
tRC Read Cycle Time
tAA Address Access Time
tACE Chip Enable Access Time
tBE Byte Enable Access Time
tOE Output Enable to Output Valid
tCLZ Chip Enable to Output in Low Z
tBLZ Byte Enable to Output in Low Z
tOLZ Output Enable to Output in Low Z
tCHZ Chip Disable to Output in High Z
tBHZ Byte Disable to Output in High Z
tOHZ Output Disable to Output in High Z
tOH Output Hold from Address Change
Write Cycle
tWC Write Cycle Time
tCW Chip Enable to End of Write
tBW Byte Enable to End of Write
tAS Address Setup Time
tAW Address Valid to End of Write
tWP Write Pulse Width
tWR Write Recovery Time
tWHZ Write to Output in High Z
tDW Data to Write Time Overlap
tDH Data Hold from Write Time
tOW Output Active from End of Write
55 - 70 - ns
- 55 - 70 ns
- 55 - 70 ns
- 55 - 70 ns
- 30 - 35 ns
10 - 10 - ns
5 - 5 - ns
5 - 5 - ns
- 20 - 25 ns
- 20 - 25 ns
- 20 - 25 ns
5 - 10 - ns
55 - 70 - ns
50 - 60 - ns
50 - 60 - ns
0 - 0 - ns
50 - 60 - ns
40 - 50 - ns
0 - 0 - ns
- 25 - 30 ns
25 - 30 - ns
0 - 0 - ns
5 - 5 - ns
Note: tCHZ, tBHZ and tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
PRELIMINARY (March, 2001, Version 0.2)
6
AMIC Technology, Inc.
7페이지 | |||
구 성 | 총 15 페이지수 | ||
다운로드 | [ A62S7316V-55SI.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
A62S7316V-55S | 128K X 16 BIT LOW VOLTAGE CMOS SRAM | AMIC Technology |
A62S7316V-55SI | 128K X 16 BIT LOW VOLTAGE CMOS SRAM | AMIC Technology |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |