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9410A PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 9410A
기능 Single N-Channel Enhancement Mode Field Effect Transistor
제조업체 Fairchild Semiconductor
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9410A 데이터시트, 핀배열, 회로
93LC76/86
8K/16K 2.5V Microwire® Serial EEPROM
FEATURES
• Single supply with programming operation down
to 2.5V
• Low power CMOS technology
- 1 mA active current typical
- 5 µA standby current (typical) at 3.0V
• ORG pin selectable memory configuration
1024 x 8 or 512 x 16 bit organization (93LC76)
2048 x 8 or 1024 x 16 bit organization (93LC86)
• Self-timed ERASE and WRITE cycles
(including auto-erase)
• Automatic ERAL before WRAL
• Power on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device status signal during ERASE/WRITE cycles
• Sequential READ function
• 10,000,000 ERASE/WRITE cycles guaranteed
• Data retention > 200 years
• 8-pin PDIP/SOIC package
• Temperature ranges available
- Commercial (C)
- Industrial (I)
0°C to +70°C
-40°C to +85°C
DESCRIPTION
The Microchip Technology Inc. 93LC76/86 are 8K and
16K low voltage serial Electrically Erasable PROMs.
The device memory is configured as x8 or x16 bits
depending on the ORG pin setup. Advanced CMOS
technology makes these devices ideal for low power
non-volatile memory applications. These devices also
have a Program Enable (PE) pin to allow the user to
write protect the entire contents of the memory array.
The 93LC76/86 is available in standard 8-pin DIP and
8-pin surface mount SOIC packages.
PACKAGE TYPES
DIP Package
CS 1
CLK 2
DI 3
DO 4
8 VCC
7 PE
6 ORG
5 VSS
SOIC Package
CS 1
CLK 2
DI 3
DO 4
8 VCC
7 PE
6 ORG
5 VSS
BLOCK DIAGRAM
VCC VSS
Memory
Array
Address
Decoder
Data
Register
DI
Mode
PE
CS
Decode
Logic
CLK
Clock
Generator
Address
Counter
Output
Buffer
DO
Microwire is a registered trademark of National Semiconductor Incorporated.
© 1996 Microchip Technology Inc.
Preliminary
This document was created with FrameMaker 4 0 4
DS21131C-page 1




9410A pdf, 반도체, 판매, 대치품
93LC76/86
TABLE 1-4: INSTRUCTION SET FOR 93LC76: ORG=1 (1X16 ORGANIZATION)
Instruction SB Opcode
Address
Data In Data Out
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-5:
1 10 X A8 A7 A6 A5 A4 A3 A2 A1 A0 — D15 - D0
1 00 1 1 X X X X X X X X — High-Z
1 11 X A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY)
1 00 1 0 X X X X X X X X — (RDY/BSY)
1 01 X A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 - D0 (RDY/BSY)
1 00 0 1 X X X X X X X X D15 - D0 (RDY/BSY)
1 00 0 0 X X X X X X X X — High-Z
INSTRUCTION SET FOR 93LC76: ORG=0 (X8 ORGANIZATIONI
Req. CLK
Cycles
29
13
13
13
29
29
13
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-6:
SB Opcode
Address
Data In Data Out
1 10 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D7 - D0
1 00 1 1 X X X X X X X X
— High-Z
1 11 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY)
1 00 1 0 X X X X X X X X
— (RDY/BSY)
1 01 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 - D0 (RDY/BSY)
1 00 0 1 X X X X X X X X
D7 - D0 (RDY/BSY)
1 00 0 0 X X X X X X X X
— High-Z
INSTRUCTION SET FOR 93LC86: ORG=1 (X16 ORGANIZATION)
Req. CLK
Cycles
22
14
14
14
22
22
14
Instruction SB Opcode
Address
Data In Data Out
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-7:
1 10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D15 - D0
1 00 1 1 X X X X X X X X — High-Z
1 11 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY)
1 00 1 0 X X X X X X X X — (RDY/BSY)
1 01 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 - D0 (RDY/BSY)
1 00 0 1 X X X X X X X X D15 - D0 (RDY/BSY)
1 00 0 0 X X X X X X X X — High-Z
INSTRUCTION SET FOR 93LC86: ORG=0 (X8 ORGANIZATION)
Req. CLK
Cycles
29
13
13
13
29
29
13
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
SB Opcode
Address
Data In
Data Out
Req. CLK
Cycles
1 10 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D7 - D0
22
1 00 1 1 X X X X X X X X
— High-Z
14
1 11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY) 14
1 00 1 0 X X X X X X X X
— (RDY/BSY)
14
1 01 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 - D0 (RDY/BSY) 22
1 00 0 1 X X X X X X X X
D7 - D0 (RDY/BSY)
22
1 00 0 0 X X X X X X X X
— High-Z
14
DS21131C-page 4
Preliminary
© 1996 Microchip Technology Inc.

4페이지










9410A 전자부품, 판매, 대치품
93LC76/86
FIGURE 3-1: SYNCHRONOUS DATA TIMING
VIH
CS
VIL
TCSS
TCKH
TCKL
CLK
VIH
VIL
VIH
DI
VIL
DO VOH
(Read) VOL
DO VOH
(Program) VOL
TDIS
TDIH
TPD
TPD
TSV
STATUS VALID
The memory automatically cycles to the next register.
FIGURE 3-2: READ
CS
TCSH
TCZ
TCZ
TCSL
CLK
DI 1 1 0 AN ... A0
DO
HIGH IMPEDANCE
0 DN ... D0 DN ... D0
FIGURE 3-3: EWEN
CS
TCSL
CLK
DI 1 0 0
FIGURE 3-4: EWDS
CS
11 X
...
ORG=VCC, 8 X’s
ORG=VSS, 9 X’s
X
TCSL
CLK
DI
10 0 00X
...
ORG=VCC, 8 X’s
ORG=VSS, 9 X’S
X
© 1996 Microchip Technology Inc.
Preliminary
DS21131C-page 7

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부품번호상세설명 및 기능제조사
9410A

Single N-Channel Enhancement Mode Field Effect Transistor

Fairchild Semiconductor
Fairchild Semiconductor
9410A

N-Channel Enhancement Mode Field Effect Transistor

Chino-Excel Technology
Chino-Excel Technology

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