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9602 데이터시트 PDF




National Semiconductor에서 제조한 전자 부품 9602은 전자 산업 및 응용 분야에서
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부품번호 9602 기능
기능 Dual Retriggerable/ Resettable One Shots
제조업체 National Semiconductor
로고 National Semiconductor 로고


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9602 데이터시트, 핀배열, 회로
DataSheet.in
June 1989
9602 DM9602 Dual Retriggerable
Resettable One Shots
General Description
These dual resettable retriggerable one shots have two in-
puts per function one which is active high and one which is
active low This allows the designer to employ either lead-
ing-edge or trailing-edge triggering which is independent of
input transition times When input conditions for triggering
are met a new cycle starts and the external capacitor is
allowed to rapidly discharge and then charge again The
retriggerable feature permits output pulse widths to be ex-
tended In fact a continuous true output can be maintained
by having an input cycle time which is shorter than the out-
put cycle time The output pulse may then be terminated at
any time by applying a low logic level to the RESET pin
Retriggering may be inhibited by either connecting the Q
output to an active high input or the Q output to an active
low input
Features
Y 70 ns to % output width range
Y Resettable and retriggerable 0% to 100% duty cycle
Y TTL input gating leading or trailing edge triggering
Y Complementary TTL outputs
Y Optional retrigger lock-out capability
Y Pulse width compensated for VCC and temperature
variations
Y Alternate Military Aerospace device (54xxx) is available
Contact a National Semiconductor Sales Office Distrib-
utor for specifications
Connection Diagram
Dual-In-Line Package
Order Number 9602DMQB 9602FMQB or DM9602N
See NS Package Number J16A N16E or W16A
Function Table
Pin No’s
AB
HxL
H
X
L
LxH
X
H e High Voltage Level
L e Low Voltage Level
X e Don’t Care
CLR
H
H
L
Operation
Trigger
Trigger
Reset
C1995 National Semiconductor Corporation TL F 6611
TL F 6611 – 1
RRD-B30M105 Printed in U S A




9602 pdf, 반도체, 판매, 대치품
DataSheet.in
Operating Rules (Continued)
B Use with high inverse leakage current electrolytic ca-
pacitors
The diode in this configuration prevents high inverse
leakage currents through the capacitor by preventing
an inverse voltage across the capacitor The use of
this configuration is not recommended with retriggera-
ble operation
t 0 3 RCX
TL F 6611–5
C Use to obtain extended pulse widths
This configuration can be used to obtain extended
pulse widths because of the larger timing resistor al-
lowed by beta multiplication Electrolytics with high in-
verse leakage currents can be used
R k RX (0 7) (hFE Q1) or k 2 5 MX whichever is the
lesser
RX (min) k RY k RX (max)
(5 kX s RY s 10 kX is recommended)
Q1 NPN silicon transistor with hFE requirements of
above equations such as 2N5961 or 2N5962
t 0 3 RCX
7 Input Trigger Pulse Rules (See Triggering Truth Table)
TL F 6611 – 8
Input to Pin 5(11)
(Pin 3(13) e HIGH)
Pin 4(12) e LOW
t1 t3 e Min Positive Input Pulse Width l 40 ns
t2 t4 e Min Negative Input Pulse Width l 40 ns
TL F 6611 – 9
Input to Pin 4(12)
(Pin 3(13) e HIGH)
Pin 5(11) e HIGH
8 The retriggerable pulse width is calculated as shown be-
low
 J1
tW e t a tPLH e K RX CX
1a
RX
a tPLH
TL F 6611–6
This configuration is not recommended with retriggera-
ble operation
5 To obtain variable pulse width by remote trimming the
following circuit is recommended
TL F 6611 – 10
The retrigger pulse width is equal to the pulse width (t) plus a delay time For
pulse widths greater than 500 ns tW can be approximated as t Retriggering will
not occur if the retrigger pulse comes within 0 3 CX (ns) after the initial trigger
pulse (i e during the discharge cycle)
9 Reset Operation An overriding clear (active LOW level)
is provided on each one shot By applying a LOW to the
reset any timing cycle can be terminated or any new cy-
cle inhibited until the LOW reset input is removed Trigger
inputs will not produce spikes in the output when the re-
set is held LOW
TL F 6611–7
6 Under any operating condition CX and RX (min) must be
kept as close to the circuit as possible to minimize stray
capacitance and reduce noise pickup
TL F 6611 – 11
10 VCC and Ground wiring should conform to good high
frequency standards so that switching transients on VCC
and Ground leads do not cause interaction between one
shots Use of a 0 01 to 0 1 mF bypass capacitor be-
tween VCC and Ground located near the DM9602 is rec-
ommended
For further detailed device characteristics and output performance please
refer to the NSC one-shot application note AN-366
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9602 전자부품, 판매, 대치품
DataSheet.in
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 9602DMQB
NS Package Number J16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM9602N
NS Package Number N16E
7

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