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PDF A43L3616V-6V Data sheet ( Hoja de datos )
| Número de pieza | A43L3616V-6V | |
| Descripción | 2M X 16 Bit X 4 Banks Synchronous DRAM | |
| Fabricantes | AMIC Technology | |
| Logotipo |  |
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A43L3616
2M X 16 Bit X 4 Banks Synchronous DRAM
Features
n JEDEC standard 3.3V power supply
n LVTTL compatible with multiplexed address
n Four banks / Pulse RAS
n MRS cycle with address key programs
- CAS Latency (2,3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave)
n All inputs are sampled at the positive going edge of
the system clock
n Clock Frequency: 166MHz @ CL=3
143MHz @ CL=3
n Burst Read Single-bit Write operation
n DQM for masking
n Auto & self refresh
n 64ms refresh period (4K cycle)
n 54 Pin TSOP (II)
n Low Self Refresh Current version for –V grade
General Description
The A43L3616 is 134,217,728 bits synchronous high data
rate Dynamic RAM organized as 4 X 2,097,152 words by
16 bits, fabricated with AMIC’s high performance CMOS
technology. Synchronous design allows precise cycle
control with the use of system clock. I/O transactions are
Pin Configuration
n TSOP (II)
possible on every clock cycle. Range of operating
frequencies, programmable latencies allows the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28
A43L3616V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
(February, 2002, Version 3.0)
1 AMIC Technology, Inc.
1 page  
Decoupling Capacitance Guide Line
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Decoupling Capacitance between VDD and VSS
CDC1
Decoupling Capacitance between VDDQ and VSSQ
CDC2
Note: 1. VDD and VDDQ pins are separated each other.
All VDD pins are connected in chip. All VDDQ pins are connected in chip.
2. VSS and VSSQ pins are separated each other
All VSS pins are connected in chip. All VSSQ pins are connected in chip.
Value
0.1 + 0.01
0.1 + 0.01
A43L3616
Unit
µF
µF
DC Electrical Characteristics
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C )
Symbol
Parameter
Test Conditions
Icc1
Icc2 P
Icc2 PS
Operating Current
(One Bank Active)
Burst Length = 1
tRC ≥ tRC(min), tCC ≥ tCC(min), IOL = 0mA
Precharge Standby Current CKE ≤ VIL(max), tCC = 15ns
in power-down mode
CKL ≤ VIL(max), tCC = ∞
ICC2N
ICC2NS
ICC3N
Precharge Standby Current
in non power-down mode
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable.
Active Standby current in
non power-down mode
(One Bank Active)
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
ICC4 Operating Current
(Burst Mode)
ICC5 Refresh Current
IOL = 0mA, Page Burst
All bank Activated, tCCD = tCCD (min)
tRC ≥ tRC (min)
ICC6 Self Refresh Current
CKE ≤ 0.2V
Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).
2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).
3. ICC6 normal version : A43L3616V-6, A43L3616V-7
4. ICC6 low self refresh current version : A43L3616V-6V, A43L3616V-7V
Speed
-6 -7
Unit Notes
130 mA 1
2
mA
1
20
mA
15
30 mA
160 mA 1
160 mA 2
23
mA
0.8 4
(February, 2002, Version 3.0)
5 AMIC Technology, Inc.
5 Page 
A43L3616
Burst Sequence (Burst Length = 4)
Initial address
A1 A0
Sequential
Interleave
0001230123
0112301032
1023012301
1130123210
Burst Sequence (Burst Length = 8)
Initial address
A2 A1 A0
Sequential
Interleave
0000123456701234567
0011234567010325476
0102345670123016745
0113456701232107654
1004567012345670123
1015670123454761032
1106701234567452301
1117012345676543210
(February, 2002, Version 3.0)
11 AMIC Technology, Inc.
11 Page | ||
| Páginas | Total 41 Páginas | |
| PDF Descargar | [ Datasheet A43L3616V-6V.PDF ] | |
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