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PDF 74HCT7046A Data sheet ( Hoja de datos )

Número de pieza 74HCT7046A
Descripción Phase-locked-loop with lock detector
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! 74HCT7046A Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT7046A
Phase-locked-loop with lock
detector
Product specification
File under Integrated Circuits, IC06
December 1990

1 page




74HCT7046A pdf
Philips Semiconductors
Phase-locked-loop with lock detector
PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SYMBOL
LD
PC1OUT
COMPIN
VCOOUT
INH
C1A
C1B
GND
VCOIN
DEMOUT
R1
R2
PC2OUT
SIGIN
CLD
VCC
NAME AND FUNCTION
lock detector output (active HIGH)
phase comparator 1 output
comparator input
VCO output
inhibit input
capacitor C1 connection A
capacitor C1 connection B
ground (0 V)
VCO input
demodulator output
resistor R1 connection
resistor R2 connection
phase comparator 2 output
signal input
lock detector capacitor input
positive supply voltage
Product specification
74HC/HCT7046A
Fig.1 Pin configuration.
December 1990
Fig.2 Logic symbol.
5
Fig.3 IEC logic symbol.

5 Page





74HCT7046A arduino
Philips Semiconductors
Phase-locked-loop with lock detector
Product specification
74HC/HCT7046A
Phase comparator section
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
74HC
+25
40 to +85
UNIT
40 to +125
VCC
(V)
min. typ. max. min. max. min. max.
VI
OTHER
DC coupled HIGH
1.5 1.2
1.5
1.5
2.0
VIH
level input voltage
3.15 2.4
SIGIN, COMPIN
4.2 3.2
3.15 3.15 V 4.5
4.2 4.2
6.0
DC coupled LOW level
0.8 0.5
0.5
0.5
2.0
VIL input voltage
SIGIN, COMPIN
2.1 1.35
1.35
1.35 V
4.5
2.8 1.8 1.8 1.8
6.0
HIGH level output
1.9 2.0
1.9
1.9
2.0 VIH IO = 20 µA
VOH voltage
4.4 4.5
4.4
4.4
V 4.5 or IO = 20 µA
LD, PCnOUT
5.9 6.0
5.9
5.9
6.0 VIL IO = 20 µA
VOH
HIGH level output
voltage
LD, PCnOUT
3.98 4.32
5.48 5.81
3.84
5.34
3.7
5.2
V
4.5
6.0
VIH
or
VIL
IO = 4.0 mA
IO = 5.2 mA
LOW level output
VOL voltage
LD, PCnOUT
0 0.1 0.1 0.1
2.0 VIH IO = 20 µA
0 0.1
0.1
0.1 V
4.5 or IO = 20 µA
0 0.1 0.1 0.1
6.0 VIL IO = 20 µA
LOW level output
VOL voltage
LD, PCnOUT
0.15 0.26
0.16 0.26
0.33
0.33
0.4
0.4
V
4.5
6.0
VIH
or
VIL
IO = 4.0 mA
IO = 5.2 mA
±II input leakage current
SIGIN, COMPIN
3.0
7.0
18.0
4.0
9.0
23.0
5.0 µA
11.0
27.0
2.0 VCC
3.0 or
4.5 GND
30.0 38.0 45.0
6.0
±IOZ
3-state
OFF-state current
PC2OUT
RI input resistance
SIGIN, COMPIN
0.5 5.0 10.0 µA 6.0 VIH VO = VCC
or or GND
VIL
800 k3.0 VI at self-bias
250 4.5 operating point;
150 6.0 VI = 0.5 V; see
Figs 10, 11 and 12
December 1990
11

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