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CS4953 데이터시트 PDF




Cirrus Logic에서 제조한 전자 부품 CS4953은 전자 산업 및 응용 분야에서
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부품번호 CS4953 기능
기능 NTSC/PAL Digital Video Encoder
제조업체 Cirrus Logic
로고 Cirrus Logic 로고


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CS4953 데이터시트, 핀배열, 회로
CS4952/53
NTSC/PAL Digital Video Encoder
Features
l Simultaneous composite and S-video output
l Supports RS170A and CCIR601 composite
output timing
l Multi-standard support for NTSC-M, PAL (B, D,
G, H, I, M, N, Combination N)
l Optional progressive scan @ MPEG2 field rates
l CCIR656 input mode supporting EAV/SAV
codes and CCIR601 Master/Slave input modes
l Stable color subcarrier for MPEG2 systems
l NTSC closed caption encoder with interrupt
l Supports Macrovision copy protection in
CS4953 version
l Host interface configurable for parallel or I2C
compatible operation
l General purpose input and output pins
l Individual DAC power-down capability
l On-chip voltage reference generator
l On-chip color bar generator
l +5 volt only, CMOS, low power modes, tri-state
DACs
Description
The CS4952/3 provides full conversion from YCbCr or
YUV digital video formats into NTSC & PAL Composite
and Y/C (S-video) analog video. Input formats can be
27 MHz 8-bit YUV, 8-bit YCbCr, or CCIR656 with sup-
port for EAV/SAV codes. Output video can be formatted
to be compatible with NTSC-M, or PAL B,D,G,H,I,M,N,
and Combination N systems. Also supported is NTSC
line 21 and line 284 closed captioning encoding.
Four 9-bit DACs provide two channels for an S-Video out-
put port and two composite video outputs. 2x oversampling
reduces the output filter requirements and guarantees
no DAC related modulation components within the spec-
ified bandwidth of any of the supported video standards.
Parallel or high speed I2C compatible control interfaces
are provided for flexibility in system design. The parallel
interface doubles as a general purpose I/O port when the
CS4952/3 is in I2C mode to help conserve valuable
board area.
ORDERING INFORMATION
CS4952/3-CL 44 pin PLCC
CS4952/3-CQ 44 pin TQFP
CLK
SCL
SDA
PDAT[7:0]
RD*
WR*
8
I 2C
Interface
Host
Parallel
Interface
Control
Registers
ADDR
XTAL
Color Sub-carrier
Synthesizer
VAA
Output
Interpolate
LPF
Chroma Amplifier
Chroma Modulate
Σ
Burst Insert
Chroma Interpolate
9-Bit
DAC
9-Bit
DAC
9-Bit
DAC
9-Bit
DAC
C
CVBS37
CVBS75
Y
8
VD[7:0]
Video
Formatter
U, V
Y
LPF
Luma Delay
HSYNC*
VSYNC*
FIELD
INT
RESET*
Video Timing
Generator
Luma Amplifier
Sync Insert
Output
Interpolate
LPF
GND
Voltage
Reference
Current
Reference
TEST
VREFIN
VREFOUT
ISET
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
Copyright © Cirrus Logic, Inc. 1997
(All Rights Reserved)
OCT ‘97
DS223PP2
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CS4953 pdf, 반도체, 판매, 대치품
CS4952/53
AC & DC PARAMETRIC SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (AGND, DGND = 0 V, all voltages with respect to 0 V.)
Parameter
Power Supply
Input Current Per Pin
Except Supply Pins
Output Current Per Pin
Except Supply Pins
Analog Input Voltage
Digital Input Voltage
Ambient Temperature
Power Applied
Storage Temperature
Symbol
VAA
Min Max
-0.3 6.0
-10 10
-50 +50
-0.3 VAA+0.3
-0.3 VAA+0.3
-55 +125
-65 +150
Units
V
mA
mA
V
V
°C
°C
Warning: Operating beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS: (AGND, DGND = 0 V, all voltages with
respect to 0 V.)
Parameter
Power Supplies: Digital Analog
Operating Ambient Temperature
Symbol
VAA
TA
Min Typ Max
4.75 5.0 5.25
0 +25 +70
Units
V
°C
4 DS223PP2

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CS4953 전자부품, 판매, 대치품
CS4952/53
A.C. CHARACTERISTICS:
Parameter
Pixel Input and Control Port
Clock Pulse High Time
Clock Pulse Low Time
Clock to Data Set-up Time
Clock to Data Hold Time
Clock to Data Output Delay
Symbol Min
Tch 14.82
Tcl 14.82
Tisu 6
Tih 0
Toa -
Typ Max Units
18.52
18.52
-
-
-
22.58
22.58
-
-
17
ns
ns
ns
ns
ns
CLK
V[7:0]
Tch Tcl
Tisu
HSYNC*/VSYNC*
(Inputs)
Tih
Toa
HSYNC*/VSYNC*/
CB/FIELD/INT
(Outputs)
Figure 1. Video Pixel Data and Control Port Timing
Parameter
I2C Host Port Timing
SCL Frequency
Clock Pulse High Time
Clock Pulse Low Time
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
Rise Time
Fall Time
Setup Time (Stop Condition)
Bus Free Time
Data Hold Time
SCL Low to Data Out Valid
Tbuf Tsh
Symbol Min
Fclk
Tsph
Tspl
Tsh
Tssu
Tsds
Tsr
Tsf
Tss
Tbuf
Tdh
Tvdo
Tdh Tsds
100
0.1
0.7
100
100
50
100
100
0
Tsh
SDA
SCL
Tsr Tsph
Tvdo
Tspl Tsf Tssu
Figure 2. I2C Host Port Timing
Typ Max Units
1000
1
0.3
600
Tss
KHz
µs
µs
ns
ns
ns
µs
µs
ns
ns
ns
ns
DS223PP2
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