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PDF CS51221EDR16 Data sheet ( Hoja de datos )
| Número de pieza | CS51221EDR16 | |
| Descripción | Enhanced Voltage Mode PWM Controller | |
| Fabricantes | Cherry Semiconductor Corporation | |
| Logotipo |  |
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CS51221
Enhanced Voltage Mode PWM Controller
Description
The CS51221 fixed frequency
feed forward voltage mode
PWM controller contains all of
the features necessary for basic
voltage mode operation. This
PWM controller has been opti-
mized for high frequency prima-
ry side control operation. In
addition, this device includes
such features as: Soft Start, accu-
rate duty cycle limit control, less
than 50µA startup current, over
and under voltage protection,
and bidirectional synchroniza-
tion. The CS51221 is available in
16 lead PDIP and SO narrow
surface mount packages.
Application Diagram
36V-72V to 5V/5A converter
1µF
SYNC
VIN (36V to 72V)
BAS21
100
51k
11V
22µF
FZT688
18V
160k
10 0.1µF
24.3k
0.22µF
10k 200
2200pF
330pF
0.01µF
VC
VREF
COMP
VFB
RT/CT
VCC
UV
OV
ISET
FF
SYNC
SS
LGnd
GATE
ISENSE
U1 PGnd
470pF
20.25k
1µF
510k
4.3k
13k
10
T3
100:1
10k
T1 MBRB2545CT
4:1
D11
BAS21
10
680pF
100pF
D13
V33MLA1206A23
IRF634
62
10
T2
2:5
100µF
0.1µF 5.1k
5.6k
150 4700pF
1k
180
MOC81025
1k TL431
2k
2k
VOUT
(5V/5A)
SGnd
Features
s 1MHz Frequency Capability
s Fixed Frequency Voltage
Mode Operation, with Feed
Forward
s Thermal Shutdown
s Under Voltage Lock-out
s Accurate Programmable Max
Duty Cycle Limit
s 1A Sink/Source Gate Drive
s Programmable Pulse by
Pulse Over Current
Protection
s Leading Edge Current Sense
Blanking
s 75ns Shutdown Propagation
Delay
s Programmable Soft Start
s Under Voltage Protection
s Over Voltage Protection with
Programmable Hysteresis
s Bidirectional
Synchronization
s 25ns GATE Rise and Fall
Time (1nF load)
s 3.3V 3% Reference Voltage
Output
Package Options
16 Lead SO Narrow & PDIP
GATE 1
ISENSE
SYNC
FF
UV
OV
RTCT
ISET
VC
PGnd
VCC
VREF
LGnd
SS
COMP
VFB
Rev. 3/26/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
1 A ® Company
1 page  
Electrical Characteristics: -40˚C < TA < 85˚C; -40˚C < TJ < 125˚C; 3V < VC < 15V; 4.7V < VCC < 15V; Rt=12K, Ct=390pF
Unless otherwise stated.
PARAMETER
s Overcurrent Protection
Overcurrent Threshold
ISENSE to GATE Delay
TEST CONDITIONS
ISET = 0.5V, Ramp ISENSE
MIN
0.475
50
TYP
0.500
90
MAX
0.525
125
UNIT
V
ns
s External Voltage Monitors
Overvoltage Threshold
Overvoltage Hysteresis
Current
Undervoltage Threshold
Undervoltage Hysteresis
OV increasing
OV = 2.15V
UV increasing
1.9 2.0
10.0 12.5
0.95 1.00
25 75
2.1 V
15.0 µA
1.05 V
125 mV
s Soft Start (SS)
Charge Current
Discharge Current
Charge Voltage
Discharge Voltage
Soft Start Clamp Offset
Soft Start Fault Voltage
SS = 2V
SS = 2V
FF = 1.25V
OV = 2.15V or LV = 0.85V
40 50
45
2.8 3.0
0.25 0.3
1.15 1.25
0.1
70 µA
7 µA
3.4 V
0.35 V
1.35 V
0.2 V
s Blanking
Blanking Time
SS Blanking Disable
Threshold
COMP Blanking Disable
Threshold
VFB < 1
VFB < 1, SS > 3V
50 150
2.8 3.0
2.8 3.0
250 ns
3.3 V
3.3 V
s Thermal Shutdown
Thermal Shutdown
Thermal Hysteresis
(Note 1)
(Note 1)
125 150
5 10
180 ˚C
15 ˚C
Note 1: Guaranteed by design, not 100% tested in production.
5
5 Page 
COMP
Application Information: continued
VOUT
VIN(LOW). Otherwise, two voltage dividers have to be used
to program OV and UV separately.
Ier R1
-
Ri
FB
+
+- 1.27
R2
VIN R1 R2 R3
VUV
Figure 11. OV/UV Monitor Divider.
VOV
Figure 10. The design of feedback voltage divider has to consider the
error amplifier input current.
Design voltage dividers for OV and UV detection
In Fig.11, the voltage divider uses three resistors in series
to set OV and UV threshold seen from the input voltage.
The values of the resistors can be calculated from the fol-
lowing three equations, where the third equation is
derived from OV hysteresis requirement.
( )VIN(LOW) ×
R2 + R3
R2 + R3 + R1
= 1V
(A)
( )VIN(HIGH) ×
R3
R2 + R3 + R1
= 2V
12.5µA × (R1 + R2) = VHYST
(B)
(C)
where
VLINE(LOW), VLINE(HIGH) = input voltage OV and UV threshold
VHYST = OV hysteresis seen at VIN
It is self-evident from equation A and B that to use this
design, VIN(HIGH) has to be two times greater than
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CS51221EDR16.PDF ] | |
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