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PDF CS5171 Data sheet ( Hoja de datos )
| Número de pieza | CS5171 | |
| Descripción | 1.5 A 280 kHz/560 kHz Boost Regulators | |
| Fabricantes | ON Semiconductor | |
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CS5171, CS5172, CS5173,
CS5174
1.5 A 280 kHz/560 kHz
Boost Regulators
The CS5171/2/3/4 products are 280 kHz/560 kHz switching
regulators with a high efficiency, 1.5 A integrated switch. These parts
operate over a wide input voltage range, from 2.7 V to 30 V. The
flexibility of the design allows the chips to operate in most power
supply configurations, including boost, flyback, forward, inverting,
and SEPIC. The ICs utilize current mode architecture, which allows
excellent load and line regulation, as well as a practical means for
limiting current. Combining high frequency operation with a highly
integrated regulator circuit results in an extremely compact power
supply solution. The circuit design includes provisions for features
such as frequency synchronization, shutdown, and feedback controls
for either positive or negative voltage regulation. These parts are
pin−to−pin compatible with LT1372/1373.
Part Number
CS5171
CS5172
CS5173
CS5174
Frequency
280 kHz
280 kHz
560 kHz
560 kHz
Feedback Voltage Polarity
positive
negative
positive
negative
Features
• Pb−Free Packages are Available
• Integrated Power Switch: 1.5 A Guaranteed
• Wide Input Range: 2.7 V to 30 V
• High Frequency Allows for Small Components
• Minimum External Components
• Easy External Synchronization
• Built in Overcurrent Protection
• Frequency Foldback Reduces Component Stress During an
Overcurrent Condition
• Thermal Shutdown with Hysteresis
• Regulates Either Positive or Negative Output Voltages
• Shut Down Current: 50 mA Maximum
• Pin−to−Pin Compatible with LT1372/1373
• Wide Temperature Range
♦ Industrial Grade: −40°C to 125°C
♦ Commercial Grade: 0°C to 125°C
http://onsemi.com
SOIC−8
D SUFFIX
CASE 751
PIN CONNECTIONS AND
MARKING DIAGRAM
1 CS5171/3 8
VC VSW
FB PGND
Test AGND
SS VCC
CS5172/4
18
VC VSW
Test PGND
NFB
AGND
SS VCC
x = 1, 2, 3, or 4
x = E, G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 17 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
June, 2004 − Rev. 20
1
Publication Order Number:
CS5171/D
1 page  
CS5171, CS5172, CS5173, CS5174
VCC
SS
NFB
CS5172/4
only
FB
CS5171/3
only
Shutdown
Delay
Timer
2.0 V
Regulator
Sync
Thermal
Shutdown
Oscillator
Frequency
Shift 5:1
200 k
250 k
2.0 V
Negative
Error Amp
+
−
1.276 V
−0.65 V Detector
0.4 V Detector
−
+
Positive
Error Amp
S
PWM
Latch
Q
R
Driver
VSW
Switch
Slope
Compensation
×5
PWM
Comparator
+−
Ramp
Summer
63 mW
PGND
AGND
VC
Figure 2. Block Diagram
http://onsemi.com
5
5 Page 
CS5171, CS5172, CS5173, CS5174
Switch Driver and Power Switch
The switch driver receives a control signal from the logic
section to drive the output power switch. The switch is
grounded through emitter resistors (63 mW total) to the
PGND pin. PGND is not connected to the IC substrate so that
switching noise can be isolated from the analog ground. The
peak switching current is clamped by an internal circuit. The
clamp current is guaranteed to be greater than 1.5 A and
varies with duty cycle due to slope compensation. The
power switch can withstand a maximum voltage of 40 V on
the collector (VSW pin). The saturation voltage of the switch
is typically less than 1 V to minimize power dissipation.
Short Circuit Condition
When a short circuit condition happens in a boost circuit,
the inductor current will increase during the whole
switching cycle, causing excessive current to be drawn from
the input power supply. Since control ICs don’t have the
means to limit load current, an external current limit circuit
(such as a fuse or relay) has to be implemented to protect the
load, power supply and ICs.
In other topologies, the frequency shift built into the IC
prevents damage to the chip and external components. This
feature reduces the minimum duty cycle and allows the
transformer secondary to absorb excess energy before the
switch turns back on.
IL
approximately 1.5 V, the internal power switch briefly turns
on. This is a part of the CS517x’s normal operation. The
turn−on of the power switch accounts for the initial current
swing.
When the VC pin voltage rises above the threshold, the
internal power switch starts to switch and a voltage pulse can
be seen at the VSW pin. Detecting a low output voltage at the
FB pin, the built−in frequency shift feature reduces the
switching frequency to a fraction of its nominal value,
reducing the minimum duty cycle, which is otherwise
limited by the minimum on−time of the switch. The peak
current during this phase is clamped by the internal current
limit.
When the FB pin voltage rises above 0.4 V, the frequency
increases to its nominal value, and the peak current begins
to decrease as the output approaches the regulation voltage.
The overshoot of the output voltage is prevented by the
active pull−on, by which the sink current of the error
amplifier is increased once an overvoltage condition is
detected. The overvoltage condition is defined as when the
FB pin voltage is 50 mV greater than the reference voltage.
COMPONENT SELECTION
Frequency Compensation
The goal of frequency compensation is to achieve
desirable transient response and DC regulation while
ensuring the stability of the system. A typical compensation
network, as shown in Figure 31, provides a frequency
response of two poles and one zero. This frequency response
is further illustrated in the Bode plot shown in Figure 32.
VOUT
VCC
VC
VC
CS5171
GND
R1
C2
C1
Figure 30. Startup Waveforms of Circuit Shown in
the Application Diagram. Load = 400 mA.
The CS517x can be activated by either connecting the
VCC pin to a voltage source or by enabling the SS pin.
Startup waveforms shown in Figure 30 are measured in the
boost converter demonstrated in the Application Diagram
on the page 2 of this document. Recorded after the input
voltage is turned on, this waveform shows the various
phases during the power up transition.
When the VCC voltage is below the minimum supply
voltage, the VSW pin is in high impedance. Therefore,
current conducts directly from the input power source to the
output through the inductor and diode. Once VCC reaches
Figure 31. A Typical Compensation Network
The high DC gain in Figure 32 is desirable for achieving
DC accuracy over line and load variations. The DC gain of
a transconductance error amplifier can be calculated as
follows:
GainDC + GM RO
where:
GM = error amplifier transconductance;
RO = error amplifier output resistance ≈ 1 MW.
The low frequency pole, fP1, is determined by the error
amplifier output resistance and C1 as:
fP1
+
1
2pC1RO
http://onsemi.com
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet CS5171.PDF ] | |
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