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PDF CS8120YDPR5 Data sheet ( Hoja de datos )
| Número de pieza | CS8120YDPR5 | |
| Descripción | 5V/ 300mA Linear Regulator with and ENABLE RESET | |
| Fabricantes | Cherry Semiconductor Corporation | |
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CS8120
5V, 300mA Linear Regulator with
RESET and ENABLE
Description
Features
The CS8120 is a 5V, 300mA precision
linear regulator with two microproces-
sor compatible control functions and
protection circuitry included on chip.
The composite NPN-PNP output pass
transistor assures a lower dropout volt-
age (1V @ 200mA) without requiring
excessive supply current (2.5mA).
The CS8120Õs two logic control func-
tions make this regulator well suited to
applications requiring microprocessor-
based control at the board or module
level. ENABLE controls the output
stage. A high voltage (>2.9V) on the
ENABLE lead turns off the regula-
torÕs pass transistor and sends the IC
into Sleep mode where it draws only
250µA. The RESET function sends a
RESET signal when the IC is power-
ing up or whenever the output voltage
moves out of regulation. The RESET
signal is valid down to VOUT = 1V.
The CS8120 design optimizes supply
rejection by switching the internal
bandgap reference from the supply
input to the regulator output as soon as
the nominal output voltage is achieved.
Additional on chip filtering enhances
rejection of high frequency transients
on all external leads.
The CS8120 is fault protected against
short circuit, over voltage and thermal
runaway conditions.
Block Diagram *
s 5V ± 4% Output Voltage
300mA
s Low Dropout Voltage
(1V @ 150mA)
s Low Quiescent Current
(2.5mA @ IOUT = 150mA)
s µP Compatible Control
Functions
RESET
ENABLE
s Low Current Sleep Mode
IQ=250µA
s Fault Protection
Thermal Shutdown
Short Circuit
60V Load Dump
Package Options
VIN
ENABLE
RESET
ENABLE
Comparator
Over
Voltage
Shutdown
Bandgap
Supply
VREF
Thermal
Shutdown
TO VOUT
Bandgap
Reference
RESET
Comparator +
-
Output
Current
Limit
- + Error
Amplifier
* TO-220 Block Diagram
VOUT
Gnd
5 Lead TO-220 14 Lead SOIC
Tab (Gnd)
Narrow
VIN 1
NC
NC
VOUT
Gnd
SENSE
NC
ENABLE
NC
RESET
NC NC
NC NC
1 8 Lead PDIP
VOUT 1
VIN
NC
ENABLE
Gnd
SENSE
RESET
NC
5 Lead D2 PAK
1 VIN
2 ENABLE
3 Gnd
4 RESET
5 VOUT
1
Rev. 2/3/98
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
1 A ¨ Company
1 page  
Circuit Description: continued
If the input voltage rises above 26V (e.g. load dump), the
output shuts down. This response protects the internal cir-
cuitry and enables the IC to survive unexpected voltage
transients.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
Should the junction temperature of the power device
exceed 180ûC (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle heat
source in the IC.
Regulator Control Functions
provide good noise immunity.
RESET Function
A RESET signal (low voltage) is generated as the IC pow-
ers up (VOUT > VOUT - 100mV) or when VOUT drops out of
regulation (VOUT < VOUT - 140mV, typ). 40mV of hysteresis
is included in the function to minimize oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
VOUT
CS–8120
RRST
C2
22mF
5V to mP
and
System
Power
The CS8120 contains two microprocessor compatible con-
trol functions: ENABLE and RESET (Figure 3).
ENABLE Function
ENABLE switches the output transistor. When the voltage
on the ENABLE lead exceeds 2.9V typ, the output pass
transistor turns off, leaving a high impedance facing the
load. The IC will remain in Sleep mode, drawing only
250µA, until the voltage on the lead drops below 2.1V typ.
Hysteresis (800mV) is built into the ENABLE function to
FOR 7V < VIN < 26V
VIN
ENABLE
VOUT
HI
VIN(HI)
LO
VRT(ON)
VRT(OFF)
RESET
VH R PEAK
(1)
(2)
VR SAT
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
Figure 3: Circuit Waveforms for CS8120
VR PEAK
RESET
CRST
to mP
RESET
Port
Figure 4: RC Network for RESET Delay circuitry
guaranteeing that the RESET signal is valid for VOUT as low
as 1V.
An external RC network on the RESET lead (Figure 4) pro-
vides a sufficiently long delay for most microprocessor
based applications. RC values can be chosen using the fol-
lowing formula:
[ ( ) ]RTOT ´CRST
ln
ÐtDelay
VT Ð VOUT
VRST Ð VOUT
where:
RTOT = RRST in parallel with RIN,
RIN = µP port impedance,
CRST = RESET delay capacitor,
tDelay = desired delay time,
VRST = VSAT of RESET lead
(0.7V @ turn - on), and
VT = µP logic threshold voltage.
Applications Notes
The circuit depicted in Figure 5 lets the microprocessor
control its power source, the CS8120 regulator. An I/O
port on the µP and the SWITCH port are used to drive the
base of Q1. When Q1 is driven into saturation, the voltage
on the ENABLE lead falls below its lower threshold. The
regulatorÕs output is switched out. When the drive cur-
rent is removed, the voltage on the ENABLE lead rises,
the output is switched off and the IC moves into Sleep
mode where it draws 250µA.
By coupling these two controls with ENABLE , the system
has added flexibility. Once the system is running, the
state of the SWITCH is irrelevant as long as the I/O port
continues to drive Q1. The µP can turn off its own power
by withdrawing drive current, once the SWITCH is open.
This software control at the I/O port allows the µP to fin-
ish key housekeeping functions before power is removed.
The logic options are summarized in Table 1 below
Table 1: Logic Control of CS8120 Output
µP I/O drive SWITCH ENABLE Output
ON
Closed
LOW
ON
Open
LOW
ON
OFF
Closed
LOW
ON
Open
HIGH
OFF
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CS8120YDPR5.PDF ] | |
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