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PDF CS8405A Data sheet ( Hoja de datos )

Número de pieza CS8405A
Descripción 96 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER
Fabricantes Cirrus Logic 
Logotipo Cirrus Logic Logotipo



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CS8405A
96 kHz Digital Audio Interface Transmitter
Features
Complete EIAJ CP1201, IEC-60958, AES3,
S/PDIF compatible transmitter
+5 V Digital Supply(VD)
+3 V to 5 V Digital Interface (VL)
On-chip Channel Status and User bit buffer
memories allow block sized updates
Flexible 3-wire serial digital audio input port
Up to 96 kHz frame rate
Microcontroller write access to Channel
Status and User bit data
On-chip differential line driver
Generates CRC codes and parity bits
Standalone mode allows use without a
microcontroller
I
General Description
The CS8405A is a monolithic CMOS device which en-
codes and transmits audio data according to the AES3,
IEC60958, S/PDIF, or EIAJ CP1201. The CS8405A ac-
cepts audio and digital data, which is then multiplexed,
encoded and driven onto a cable.
The audio data is input through a configurable, 3-wire in-
put port. The channel status and user bit data are input
through an SPI or Two-Wire microcontroller port, and
may be assembled in block sized buffers. For systems
with no microcontroller, a stand alone mode allows di-
rect access to channel status and user bit data pins.
Target applications include A/V Receivers, CD-R, DVD
receivers, digital mixing consoles, effects processors,
set-top boxes, and computer and automotive audio
systems.
ORDERING INFORMATION
CS8405A-CS 28-pin SOIC -10 to +70°C
CS8405A-CZ 28-pin TSSOP -10 to +70°C
CS8405A-IS 28-pin SOIC -40 to +85°C
CS8405A-IZ 28-pin TSSOP -40 to +85°C
CDB8415A Evaluation Board
VD+
VL+ DGND
RXP
ILRCK
ISCLK
SDIN
Serial
Audio
Input
Misc.
Control
C & U bit
Data
Buffer
Control
Port &
Registers
AES3
S/PDIF
Encoder
Driver
TXP
TXN
Output
Clock
Generator
H/S RST U TCBL SDA/ SCL/ AD1/ AD0/ AD2 INT
CDOUT CCLK CDIN CS
OMCK
Preliminary Product Information
Cirrus Logic, Inc.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
©Copyright Cirrus Logic, Inc. 2002
(All Rights Reserved)
JUN ‘02
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CS8405A pdf
CS8405A
DIGITAL CHARACTERISTICS
(TA = 25 °C for suffixes ‘CS’ &’CZ’, TA = -40 to 85°C for ‘IS’ & ‘IZ’ ; VD+ = 5V±10%, VL+ = 3/5V ±5/10%)
Parameter
Symbol Min Typ Max Units
High-Level Input Voltage
VIH 2.0
- (VL+) + 0.3 V
Low-Level Input Voltage
(Note 4)
VIL -0.3
-
0.4/0.8
V
Low-Level Output Voltage, (Io=-3.2 mA), except TXP, TXN VOL
-
- 0.4 V
High-Level Output Voltage, (Io=3.2 mA), except TXP, TXN
Input Leakage Current
VOH
Iin
(VL+) - 1
-
-
±1
-V
±10 µA
Output High Voltage, TXP, TXN (IOH = 14 mA)
(VL+) - 0.7 (VL+) - 0.4
-
V
Output Low Voltage, TXP, TXN (IOL = 14 mA)
- 0.4 0.7 V
Notes: 4. At 5V mode, VIL = 0.8V (Max), at 3V mode, VIL =0.4V (Max).
SWITCHING CHARACTERISTICS
(TA = 25 °C for suffixes ‘CS’ &’CZ’, TA = -40 to 85°C for ‘IS’ & ‘IZ’ ; VD+ = 5V±10%, VL+ = 3/5V ±5/10%, Inputs:
Logic 0 = 0 V, Logic 1 = VL+; CL = 20 pF)
Parameter
RST pin Low Pulse Width
OMCK Frequency for OMCK = 512*Fs
OMCK Low and High Width for OMCK = 512*Fs
OMCK Frequency for OMCK = 384*Fs
OMCK Low and High Width for OMCK = 384*Fs
OMCK Frequency for OMCK = 256*Fs
OMCK Low and High Width for OMCK = 256*Fs
Frame Rate
Symbol Min Typ Max Units
200 - - µs
4.1 - 55.3 MHz
7.2 - - ns
3.1 - 41.5 MHz
9.6 - - ns
2.0 - 27.7 MHz
14.4
-
-
ns
8.0 - 108.0 kHz
AES3 Transmitter Output Jitter
- - 1 ns
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CS8405A arduino
CS8405A
ILRCK
Left ISCLK
Justified
(In) SDIN
ILRCK
I2S
(In) ISCLK
SDIN
Left
MSB
Left
MSB
Right
LSB MSB
Right
LSB MSB
LSB MSB
LSB MSB
ILRCK
Right
Justified
ISCLK
(In) SDIN
LSB
Left
MSB
LSB
Right
MSB
LSB
Left Justified
I2S
Right Justified
SIMS*
X
X
X
SISF*
X
X
X
SIRES[1:0]*
00+
00+
XX
SIJUST*
0
0
1
SIDEL*
0
1
0
SISPOL*
0
0
0
SILRPOL*
0
1
0
X = don’t care to match format, but does need to be set to the desired setting
+ I2S can accept an arbitrary number of bits, determined by the number of ISCLK cycles
* See Serial Input Port Data Format Register Bit Descriptions for an explanation of the meaning of each bit
Figure 6. Serial Audio Input Example Formats
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