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PDF CS8900A-CQ Data sheet ( Hoja de datos )
| Número de pieza | CS8900A-CQ | |
| Descripción | Crystal LAN ISA Ethernet Controller | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS8900A
Product Data Sheet
FEATURES
s Single-Chip IEEE 802.3 Ethernet Controller with
Direct ISA-Bus Interface
s Maximum Current Consumption = 55 mA (5V Supply)
s 3 V Operation
s Industrial Temperature Range
s Comprehensive Suite of Software Drivers Available
s Efficient PacketPage™ Architecture Operates in
I/O and Memory Space, and as DMA Slave
s Full Duplex Operation
s On-Chip RAM Buffers Transmit and Receive Frames
s 10BASE-T Port with Analog Filters, Provides:
— Automatic Polarity Detection and Correction
s AUI Port for 10BASE2, 10BASE5 and 10BASE-F
s Programmable Transmit Features:
— Automatic Re-transmission on Collision
— Automatic Padding and CRC Generation
s Programmable Receive Features:
— Stream Transfer™ for Reduced CPU Overhead
— Auto-Switch Between DMA and On-Chip Memory
— Early Interrupts for Frame Pre-Processing
— Automatic Rejection of Erroneous Packets
s EEPROM Support for Jumperless Configuration
s Boot PROM Support for Diskless Systems
s Boundary Scan and Loopback Test
s LED Drivers for Link Status and LAN Activity
s Standby and Suspend Sleep Modes
&U\VWDO /$1™ ISA Ethernet
Controller
DESCRIPTION
The CS8900A is a low-cost Ethernet LAN Controller op-
timized for Industry Standard Architecture (ISA)
Personal Computers. Its highly-integrated design elimi-
nates the need for costly external components required
by other Ethernet controllers. The CS8900A includes
on-chip RAM, 10BASE-T transmit and receive filters,
and a direct ISA-Bus interface with 24 mA Drivers.
In addition to high integration, the CS8900A offers a
broad range of performance features and configuration-
options. Its unique PacketPage architecture
automatically adapts to changing network traffic pat-
terns and available system resources. The result is
increased system efficiency.
The CS8900A is available in a 100-pin TQFP package-
ideally suited for small form-factor, cost-sensitive
Ethernet applications. With the CS8900A, system engi-
neers can design a complete Ethernet circuit that
occupies less than 1.5 square inches (10 sq. cm) of
board space.
ORDERING INFORMATION
CS8900A-CQ 0° to 70° C 5V TQFP-100
CS8900A-IQ -40° to 85° C 5V TQFP-100
CS8900A-CQ3 0° to 70° C 3.3V TQFP-100
CS8900A-IQ3 -40° to 85° C 3.3V TQFP-100
CRD8900A-1
Evaluation Kit
EEPROM
20 MHz
XTAL
CS8900A ISA Ethernet Controller
EEPROM
Control
RAM
LED
Control
Clock
10BASE-T
RX Filters &
Receiver
I ISA
S Bus
A Logic
Encoder/
Decoder
&
PLL
10BASE-T
TX Filters &
Transmitter
AUI
Transmitter
Memory
Manager
802.3
MAC
Engine
Boundary
Scan
Test Logic
Power
Manager
AUI
Collision
AUI
Receiver
RJ-45 10BASE-T
Attachment
Unit
Interface
(AUI)
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
Copyright © Cirrus Logic, Inc. 1999
(All Rights Reserved)
MAR ‘99
1 page  
CS8900A
Crystal LAN™ ISA Ethernet Controller
4.4.8 Register 5: Receiver Control ................................................................................................... 55
4.4.9 Register 7: Transmit Configuration .......................................................................................... 56
4.4.10 Register 8: Transmitter Event ................................................................................................ 57
4.4.11 Register 9: Transmit Command Status ................................................................................. 58
4.4.12 Register B: Buffer Configuration ............................................................................................ 59
4.4.13 Register C: Buffer Event ........................................................................................................ 60
4.4.14 Register 10: Receiver Miss Counter ...................................................................................... 61
4.4.15 Register 10: Transmit Collision Counter ................................................................................ 62
4.4.16 Register 13: Line Control ....................................................................................................... 63
4.4.17 Register 14: Line Status ........................................................................................................ 64
4.4.18 Register 15: Self Control ....................................................................................................... 65
4.4.19 Register 16: Self Status ......................................................................................................... 66
4.4.20 Register 17: Bus Control ....................................................................................................... 67
4.4.21 Register 18: Bus Status ......................................................................................................... 68
4.4.22 Register 19: Test Control ....................................................................................................... 69
4.4.23 Register 1C: AUI Time Domain Reflectometer ...................................................................... 70
4.5 Initiate Transmit Registers .................................................................................................................. 71
4.5.1 Transmit Command Request - TxCMD .................................................................................... 71
4.5.2 Transmit Length ........................................................................................................................ 71
4.6 Address Filter Registers...................................................................................................................... 72
4.6.1 Logical Address Filter (hash table) ........................................................................................... 72
4.6.2 Individual Address (IEEE address) ........................................................................................... 72
4.7 Receive and Transmit Frame Locations ............................................................................................. 73
4.7.1 Receive PacketPage Locations ................................................................................................. 73
4.7.2 Transmit Locations .................................................................................................................... 73
4.8 Eight and Sixteen Bit Transfers........................................................................................................... 73
4.8.1 Transferring Odd-Byte-Aligned Data ......................................................................................... 74
4.8.2 Random Access to CS8900A Memory ...................................................................................... 74
4.9 Memory Mode Operation .................................................................................................................... 74
4.9.1 Accesses in Memory Mode ....................................................................................................... 74
4.9.2 Configuring the CS8900A for Memory Mode............................................................................. 74
4.9.3 Basic Memory Mode Transmit ................................................................................................... 75
4.9.4 Basic Memory Mode Receive .................................................................................................... 75
4.9.5 Polling the CS8900A in Memory Mode...................................................................................... 76
4.10 I/O Space Operation ......................................................................................................................... 76
4.10.1 Receive/Transmit Data Ports 0 and 1...................................................................................... 76
4.10.2 TxCMD Port............................................................................................................................. 76
4.10.3 TxLength Port .......................................................................................................................... 76
4.10.4 Interrupt Status Queue Port..................................................................................................... 76
4.10.5 PacketPage Pointer Port ......................................................................................................... 76
4.10.6 PacketPage Data Ports 0 and 1 .............................................................................................. 77
4.10.7 I/O Mode Operation ................................................................................................................. 77
4.10.8 Basic I/O Mode Transmit ......................................................................................................... 77
4.10.9 Basic I/O Mode Receive .......................................................................................................... 77
4.10.10 Accessing Internal Registers ................................................................................................. 78
4.10.11 Polling the CS8900A in I/O Mode.......................................................................................... 78
5.0 OPERATION ............................................................................................................................................. 79
5.1 Managing Interrupts and Servicing the Interrupt Status Queue .......................................................... 79
5.2 Basic Receive Operation..................................................................................................................... 79
5.2.0.1 Overview .......................................................................................................................... 79
5.2.1 Terminology: Packet, Frame, and Transfer ............................................................................... 81
5.2.1.1 Packet .............................................................................................................................. 81
5.2.1.2 Frame............................................................................................................................... 81
DS271PP3
CIRRUS LOGIC PRODUCT DATA SHEET
5
5 Page 
CS8900A
Crystal LAN™ ISA Ethernet Controller
20 MHz
5V
4.99 kΩ, 1%
EEPROM
93C46
CS 1
97 98 4.7 kΩ 77
XTAL1 XTAL2 SLEEP
3 EECS
76 93
TEST RES
RXD- 92
10 BASE T
Isolation
1 Transformer 16
6 RJ45
DO 4
6 EEDATAIN
100 Ω, 1% 1:1
DI
CLK
3
2
5 EEDATAOUT
4 EESK
RXD+ 91
24.3 Ω, 1%
TXD- 88
68 pF
3
6
1: 2
14
11
10
3
2
ISA
BUS
LA[20:23]
4
Address
Decoder
PAL
BALE
SA[0:19]
7 CHIPSEL
ELCS
20 SA[0:19]
28 MEMW
CS8900A
TXD+ 87
24.3 Ω, 1%
DO- 84
DO+ 83
8
9
.1 µF
1
12 V
AUI Isolation
1 Transformer 16
2 1:1 15
13 15 pin D
10
3
29 MEMR
62 IOW
CI- 82
CI+ 81
4 13 9
5 1:1 12 2
61 IOR
49 REFRESH
DI- 80
DI+ 79
7 10 12
8 1:1
95
36 SBHE
63 AEN
75 RESET
39.2 Ω, 1%
39.2 Ω, 1%
39.2 Ω, 1%
0.1 µF
39.2 Ω, 1%
0.1 µF
4, 6
34 MEMCS16
33 IOCS16
BSTATUS/HCI 78
5V
64 IOCHRDY
16 SD[0:15]
LANLED 100 680 Ω
IRQ10
IRQ11
32 INTRQ0
31 INTRQ1
LINKLED 99 680 Ω
IRQ12
IRQ5
DRQ5
DACK5
DRQ6
30 INTRQ2
35 INTRQ3
15 DMARQ0
16 DMACK0
13 DMARQ1
17
CSOUT
Boot-PROM
27C256
20 CE
22 OE
74LS245
19 OE
1 DIR
DACK6
14 DMACK1
DRQ7
11 DMARQ2
PD[0:7]
DACK7
12 DMACK2
SA[0:14]
SD[0:7]
15
8
Figure 3. Typical Connection Diagram
DS271PP3
CIRRUS LOGIC PRODUCT DATA SHEET
11
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet CS8900A-CQ.PDF ] | |
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