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PDF AT22LV10L-25SC Data sheet ( Hoja de datos )
| Número de pieza | AT22LV10L-25SC | |
| Descripción | Low-Voltage UV Erasable Programmable Logic Device | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Low Voltage Programmable Logic Device
– Wide Power Supply Range - 3.0V to 5.5V
– Ideal for Battery Powered Systems
• High Speed Operation
– 20 ns max Propagation Delay at VCC = 3.0V
• Commercial and Industrial Temperature Ranges
• Familiar 22V10 Logic Architecture
• Low Power 3-Volt CMOS Operation
Temp
ICC (mA)
AT22LV10L
Com./Ind.
4/5
AT22LV10
Com./Ind.
35 / 45
VCC = 3.6V
• CMOS and TTL Compatible Inputs and Outputs
– 10 µA Leakage Maximum
• Reprogrammable - Tested 100% for Programmability
• High Reliability CMOS Technology
– 2000V ESD Protection
– 200 mA Latchup Immunity
• Dual-In-Line and Surface Mount Packages
Logic Diagram
Low-Voltage UV
Erasable
Programmable
Logic Device
AT22LV10
AT22LV10L
Description
The AT22LV10 and AT22LV10L are low voltage compatible CMOS high performance
Programmable Logic Devices (PLDs). Speeds down to 20 ns and power dissipation
as low as 14.4 mW are offered. All speed ranges are specified over the 3.0V to 5.5V
range. All pins offer a low ±10 µA leakage.
(continued)
Pin Configurations
Pin Name
CLK/IN
IN
I/O
*
VCC
Function
Clock and Logic Input
Logic Inputs
Bidirectional Buffers
No Internal Connection
3.0V to 5.5V Supply
DIP/SOIC
PLCC
Rev. 0190C—05/98
1
1 page  
AT22LV10(L)
AC Characteristics for the AT22LV10L
Symbol
tPD
tEA
tER
tCF
tCO
tSF
tS
tH
tP
tW
FMAX
tAW
tAR
tAP
Parameter
Input or Feedback to Non-Registered Output
Input to Output Enable
Input to Output Disable
Clock to Feedback
Clock to Output
Feedback Setup Time
Input Setup Time
Hold Time
Clock Period
Clock Width
External Feedback 1/(tS + tCO)
Internal Feedback 1/(tSF + tCF)
No Feedback 1/(tP)
Asynchronous Reset Width
Asynchronous Reset Recovery Time
Asynchronous Reset to Registered Output Reset
AT22LV10L-25
Min Typ
15
15
15
05
0 10
12 7
17 15
0
12
6
25 15
25 15
18
Input Test Waveforms and
Measurement Levels
Output Test Loads:
Commercial
Max
25
25
25
9
14
32.2
47.6
83.3
28
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
5
5 Page 
Packaging Information
28J, 28-Lead, Plastic J-Leaded Chip Carrier (PLCC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-018 AB
.045(1.14) X 45° PIN NO. 1
IDENTIFY
.045(1.14) X 30° - 45° .012(.305)
.008(.203)
.032(.813)
.026(.660)
.050(1.27) TYP
.456(11.6)
.450(11.4)
SQ
.495(12.6)
.485(12.3)SQ
.300(7.62) REF SQ
.430(10.9)
.390(9.91)
SQ
.021(.533)
.013(.330)
.043(1.09)
.020(.508)
.120(3.05)
.090(2.29)
.180(4.57)
.165(4.19)
.022(.559) X 45° MAX (3X)
24S, 24-Lead, 0.300” Wide, Plastic Gull Wing Small
Outline (SOIC)
Dimensions in Inches and (Millimeters)
.020(.508)
.013(.330)
PIN 1 ID
.299(7.60) .420(10.7)
.291(7.39) .393(9.98)
.050(1.27) BSC
.616(15.6)
.598(15.2)
.105(2.67)
.092(2.34)
.012(.305)
.003(.076)
0 REF
8
.050(1.27)
.015(.381)
.013(.330)
.009(.229)
AT22LV10(L)
24P3, 24-Lead, 0.300” Wide. Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-011 AB
1.27(32.3)
1.25(31.7)
PIN
1
.266(6.76)
.250(6.35)
.200(5.06)
MAX
1.100(27.94) REF
.090(2.29)
MAX
.005(.127)
MIN
SEATING
PLANE
.151(3.84)
.125(3.18)
.110(2.79)
.090(2.29)
.012(.305)
.008(.203)
.065(1.65)
.040(1.02)
.070(1.78)
.020(.508)
.023(.584)
.014(.356)
.325(8.26)
.300(7.62)
0 REF
15
.400(10.2) MAX
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet AT22LV10L-25SC.PDF ] | |
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