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PDF AT27BV020-12VC Data sheet ( Hoja de datos )

Número de pieza AT27BV020-12VC
Descripción 2-Megabit 256K x 8 Unregulated Battery-Voltage High Speed OTP EPROM
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Fast Read Access Time - 90 ns
Dual Voltage Range Operation
– Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V ± 10% Supply Range
Compatible with JEDEC Standard AT27C020
Low Power CMOS Operation
– 20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V
– 29 mW max. Active at 5 MHz for VCC = 3.6V
Wide Selection of JEDEC Standard Packages
– 32-Lead PLCC
– 32-Lead TSOP (8 x 20mm)
– 32-Lead VSOP (8 x 14mm)
– 42-Ball CBGA (8 x 8mm)
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
RapidProgramming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
Description
The AT27BV020 is a high-performance, low-power, low-voltage 2,097,152-bit one-
time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It
requires only one supply in the range of 2.7 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
(continued)
Pin Configurations
CBGA Top View
Pin Name
Function
1234567
A0 - A17
O0 - O7
CE
OE
PGM
Address
Outputs
Chip Enable
Output Enable
Program Strobe
PLCC, Top View
A
GND O6 VCC VCC O2 OE GND
B
A17 O7 O4 NC NC O0 CE
C
A10 NC O5 NC O3 O1 A0
D
A14 A13 A9 NC NC A6 A3
E
A16 A11 PGM NC A7 A4 A1
F
A15 A12 A8 NC VPP A5 A2
AT27BV020
2-Megabit
(256K x 8)
Unregulated
Battery-Voltage
High Speed
OTP EPROM
AT27BV020
TSOP, VSOP Top View
Type 1
0902A-A–10/97
1

1 page




AT27BV020-12VC pdf
AT27BV020
AC Characteristics for Read Operation
(VCC = 2.7V to 3.6V and 4.5V to 5.5V)
Symbol Parameter
Condition
tACC(3)
tCE(2)
tOE(2)(3)
tDF(4)(5)
Address to Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to Output Float,
whichever occurred first
CE = OE = VIL
OE = VIL
CE = VIL
tOH
Output Hold from Address, CE or OE,
whichever occurred first
Note: 2,3,4,5. - see AC Waveforms for Read Operation
AC Waveforms for Read Operation(1)
-90
Min Max
90
90
50
AT27BV020
-12
Min Max
120
120
50
-15
Min Max
150
150
60
Units
ns
ns
ns
40 40 50 ns
0 0 0 ns
= Preliminary Information
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
5

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