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PDF AS3842 Data sheet ( Hoja de datos )

Número de pieza AS3842
Descripción Current Mode Controller
Fabricantes ETC 
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SEMICONDUCTOR
AS384x
Current Mode Controller
Features
¥ 2.5 V bandgap reference trimmed to
1.0% and temperature-compensated
¥ Standard temperature range extended
to 105¡C
¥ AS3842/3 oscillations trimmed for
precision duty cycle clamp
¥ AS3844/5 have exact 50% max duty
cycle clamp
¥ Advanced oscillator design simplifies
synchronization
¥ Improved specs on UVLO and
hysteresis provide more predictable
start-up and shutdown
¥ Improved 5 V regulator provides better
AC noise immunity
¥ Guaranteed performance with current
sense pulled below ground
Description
The AS3842 family of control ICs provide pin-for-pin replacement of the
industry standard UC3842 series of devices. The devices are
redesigned to provide significantly improved tolerances in power sup-
ply manufacturing. The 2.5 V reference has been trimmed to 1.0%
tolerance. The oscillator discharge current is trimmed to provide guar-
anteed duty cycle clamping rather than specified discharge current.
The circuit is more completely specified to guarantee all parameters
impacting power supply manufacturing tolerances.
In addition, the oscillator and flip-flop sections have been enhanced to
provide additional performance. The RT/CT pin now doubles as a syn-
chronization input that can be easily driven from open collector/open
drain logic outputs. This sync input is a high impedance input and can
easily be used for externally clocked systems. The new flip-flop topol-
ogy allows the duty cycle on the AS3844/5 to be guaranteed between
49 and 50%. The AS3843/5 requires less than 0.5 mA of start-up cur-
rent over the full temperature range.
Pin Configuration Ñ Top view
PDIP (N)
8L SOIC (D8)
14L SOIC (D14)
COMP 1
VFB 2
ISENSE 3
RT/CT 4
8 VREG
7 VCC
6 OUT
5 GND
COMP 1
VFB 2
ISENSE 3
RT/CT 4
Ordering Information
Circuit Type:
Current Mode Controller (See Table A)
Package Style
D8 = 8 Pin Plastic SOIC
D14 = 14 Pin Plastic SOIC
N = 8 Pin Plastic DIP
AS384X D8 13
8 VREG
7 VCC
6 OUT
5 GND
COMP 1
NC 2
VFB 3
NC 4
ISENSE 5
NC 6
RT/CT 7
14 VREG
13 NC
12 VCC
11 VC
10 OUT
9 PWR G
8 GND
Packaging Option:
T = Tube
13 = Tape and Reel (13" Reel Dia)
Table A
Model
AS3842
AS3843
AS3844
AS3845
VCC(min)
10
7.6
10
7.6
VCC(on)
16
8.4
16
8.4
Duty Cycle
Typ.
97%
97%
49.5%
49.5%
ICC
0.5 mA
0.3 mA
0.5 mA
0.3 mA
ASTEC Semiconductor
1

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AS3842 pdf
Current Mode Controller
AS384x
Electrical Characteristics (contÕd)
Electrical characteristics are guaranteed over full junction temperature range (0 to 105¡C). Ambient temperature must be derated
based on power dissipation and package thermal characteristics. The conditions are: VCC = 15 V, RT = 10 k½, and CT = 3.3 nF, unless
otherwise stated. To override UVLO, VCC should be raised above 17 V prior to test.
Parameter
Error Amplifier
Input Voltage
Input Bias Current
Voltage Gain
Transconductance
Unity Gain Bandwidth1
Power Supply Rejection Ratio
Output Sink Current
Output Source Current
Output Swing High
Output Swing Low
Current Sense Comparator
Transfer Gain2,3
ISENSE Level Shift2
Maximum Input Signal2
Power Supply Rejection Ratio
Input Bias Current
Propagation Delay to Output1
Output
Output Low Level
Output High Level
Rise Time1
Fall Time1
Housekeeping
Start-up Threshold
Minimum Operating Voltage
After Turn On
Output Low Level in UV State
Over-Temperature Shutdown4
Symbol
VFB
IBIAS
AVOL
Gm
GBW
PSRR
ICOMPL
ICOMPH
VCOMPH
VCOMPL
AVCS
VLS
PSRR
IBIAS
tPD
VOL
VOL
VOH
VOH
tR
tF
VCC(on)
VCC(min)
VOUV
TOT
Test Condition
TJ = 25¡C
2 ² VCOMP ² 4 V
12 ² VCC ² 25 V
VFB = 2.7 V, VCOMP = 1.1 V
VFB = 2.3 V, VCOMP = 5 V
VFB = 2.3 V, RL = 15 k½ to Ground
VFB = 2.7 V, RL = 15 k½ to Pin 8
Ð0.2 ² VSENSE ² 0.8 V
VSENSE = 0 V
VCOMP = 5 V
12 ² VCC ² 25 V
ISINK = 20 mA
ISINK = 200 mA
ISOURCE = 20 mA
ISOURCE = 200 mA
CL = 1 nF
CL = 1 nF
3842/4
3843/5
3842/4
3843/5
ISINK = 20 mA, VCC = 6 V
Min. Typ. Max. Unit
2.475
65
0.8
60
2
0.5
5
2.500
Ð0.1
90
1
1.2
70
6
0.8
5.5
0.7
2.525
Ð1
1
1.1
V
µA
dB
mA/mV
MHz
dB
mA
mA
V
V
2.85 3.0 3.15 V/V
1.5 V
0.9 1 1.1 V
70 dB
Ð1 Ð10 µA
85 150 ns
0.1 0.4 V
1.5 2.2 V
13 13.5
V
12 13.5
V
50 150 ns
50 150 ns
15 16 17 V
7.8 8.4 9.0 V
9 10 11 V
7.0 7.6 8.2 V
1.5 2.0 V
125 ¡C
ASTEC Semiconductor
5

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AS3842 arduino
Current Mode Controller
AS384x
charged via resistor (R) from the rectified AC line.
When the voltage on the capacitor (VCC) reaches
the upper UVLO threshold, the IC (and hence, the
power supply) turns on and the voltage on C
begins to quickly discharge due to the increased
operating current. During this time, the auxiliary
winding begins to supply the current necessary to
run the IC. The capacitor must be sufficiently large
to maintain a voltage greater than the lower UVLO
threshold during start-up. The value of R must be
selected to provide greater than 1 mA of current at
the minimum DC bus voltage (R < VDCmin/1 mA).
The UVLO feature of the AS3842 has significant
advantages over standard 3842 devices. First,
the UVLO thresholds are based on a temperature
compensated bandgap reference rather than con-
ventional zeners. Second, the UVLO disables the
output at power down, offering additional protec-
tion in cases where VREG is heavily decoupled.
The UVLO on some 3842 devices shuts down the
5 volt regulator only, which results in eventual
power down of the output only after the 5 volt rail
collapses. This can lead to unwanted stresses on
the switching devices during power down. The
AS3842 has two separate comparators which
monitor both VCC and VREF and hold the output
low if either are not within specification.
The AS3842 family offers two different UVLO
options. The AS3842/4 has UVLO thresholds of
16 volts (on) and 10 volts (off). The AS3843/5 has
UVLO levels of 8.4 volts (on) and 7.6 volts (off).
1.2 Reference (VREG and VFB)
The AS3842 effectively has two precise bandgap
based temperature compensated voltage refer-
ences. Most obvious is the VREG pin (pin 8) which
is the output of a series pass regulator. This 5.0 V
output is normally used to provide charging cur-
rent to the oscillatorÕs timing capacitor (Section
1.3). In addition, there is a trimmed internal 2.5 V
reference which is connected to the non-inverting
(+) input of the error amplifier. The tolerance of
the internal reference is ± 1% over the full speci-
fied temperature range, and ± 1% for VREG.
The reference section of the AS3842 is greatly
improved over the standard 3842 in a number of
ways. For example, in a closed loop system, the
voltage at the error amplifierÕs inverting input (VFB,
pin 1) is forced by the loop to match the voltage at
the non-inverting input. Thus, VFB is the voltage
which sets the accuracy of the entire system. The
2.5 V reference of the AS3842 is tightly trimmed
for precision at VFB, including errors caused by
the op amp, and is specified over temperature.
This method of trim provides a precise reference
voltage for the error amplifier while maintaining
the original 5 V regulator specifications. In addi-
tion, force/sense (Kelvin) bonding to the package
pin is utilized to further improve the 5 V load reg-
ulation. Standard 3842s, on the other hand, spec-
ify tight regulation for the 5 V output only and rate
it over line, load and temperature. The voltage at
VFB, which is of critical importance, is loosely
specified and only at 25¡C.
The reference section, in addition to providing a
precise DC reference voltage, also powers most
of the ICÕs internal circuitry. Switching noise,
therefore, can be internally coupled onto the ref-
erence. With this in mind, all of the logic within
the AS3842 was designed with ECL type circuitry
which generates less switching noise because it
runs at essentially constant current regardless of
logic state. This, together with improved AC noise
rejection, results in substantially less switching
noise on the 5 V output.
The reference output is short circuit protected
and can safely deliver more than 20 mA to power
external circuitry.
1.3 Oscillator
The newly designed oscillator of the AS3842 is
enhanced to give significantly improved perfor-
mance. These enhancements are discussed in
ASTEC Semiconductor
11

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