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PDF ADC-305-1 Data sheet ( Hoja de datos )

Número de pieza ADC-305-1
Descripción 8-Bit/ 20MHz CMOS A/D Converters
Fabricantes ETC　
Logotipo ETC Logotipo



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®®
ADC-305
8-Bit, 20MHz
CMOS A/D Converters
FEATURES
• 8-bit resolution, 20MHz min. sampling rate
• ±½LSB max. differential nonlinearity error
• 18MHz input signal bandwidth
• Subranging, S&H enclosed
• +5V single power, low 85mW max. dissipation
• CMOS compatible logic input
• 3-State TTL compatible output
GENERAL DESCRIPTION
DATEL's ADC-305 is an 8-bit, 20MHz sampling, CMOS,
subranging (two-pass) A/D converter. It processes signals at
speeds comparable to a full flash converter by using a sub-
ranging conversion technique with multiple comparator blocks,
each containing a sample and hold amplifier.
The ADC-305 features CMOS low power dissipation (60mW
typical) and a wide 18MHz (–1dB) input signal bandwidth.
The ADC-305-1 is packaged in 400 mil 24-pin DIP and the
ADC-305-3 in 300 mil 24-pin SOP.
Other features are CMOS compatible input logic, 3-state TTL
compatible output logic, +5V single power operation, self bias
mode and low cost.
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION
PIN FUNCTION
1 OUTPUT ENABLE (OE) 24 DGND
2 DGND
23 REF. BOTTOM (VRB)
3 BIT 8 (LSB)
22 SELF BIAS 1 (VRBS)
4 BIT 7
21 AGND
5 BIT 6
20 AGND
6 BIT 5
19 ANALOG INPUT (VIN)
7 BIT 4
18 +AVS (+5V)
8 BIT 3
17 REFERENCE TOP (VRT)
9 BIT 2
16 SELF BIAS 2 (VRTS)
10 BIT 1 (MSB)
15 +AVS (+5V)
11 +DVS (+5V)
14 +AVS (+5V)
12 CLOCK INPUT (A/D CLK) 13 +DVS (+5V)
Both the ADC-305-1 and the ADC-305-3 have the same pin assignment.
OUTPUT ENABLE 1
DGND 2
BIT 8 (LSB) 3
BIT 7 4
BIT 6 5
BIT 5 6
BIT 4 7
BIT 3 8
BIT 2 9
BIT 1 (MSB) 10
+DVS 11
A/D CLK 12
REFERENCE
VOLTAGE
LOWER
DATA
LATCHES
LOWER
ENCODER
(4 BIT)
UPPER
DATA
LATCHES
LOWER
ENCODER
(4 BIT)
UPPER
ENCODER
(4 BIT)
CLOCK
GENERATOR
B BLOCK
COMPARATORS
WITH S/H (4 BIT)
A BLOCK
COMPARATORS
WITH S/H (4 BIT)
UPPER
COMPARATORS
WITH S/H (4 BIT)
24 DGND
23 VRB
22 VRBS
21 AGND
20 AGND
19 VIN
18 +AVS
17 VRT
16 VRTS
15 +AVS
14 +AVS
13 +DVS
Figure 1. Functional Block Diagram
DATEL, Inc., Mansfield, MA 02048-1151 (USA) • Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 • Email: [email protected] • Internet www.datel.com

1 page




ADC-305-1 pdf
®®
ADC-305
+5V(A)
47µF
VIN
(RIN = 75Ω)
100
Gain
Adjust
Bias
Adjust
2SC2785
470µF 390
120
51
680
2SC2785
22µF
2.2k
2SC2785
10k
2.2k
–5V(A)
+5V(A)
100µH
0.1µF
0.1µF
0.1µF 13
0.1µF
0.1µF
14
15
16
12
0.1µF
11
10
9
17 8
0.1µF
18
7
75 0.1µF 19 ADC-305 6
20 5
21 4
22 3
0.1µF
23
24
2
1
510
VRB
Adjust
2k
2SC2785
2k
510
510
VRT
Adjust
2SC2785
47µF
–5V(A)
+5V(D) 47µF
0.1µF
1 20
2 19
3 18
4 17
5 16
6 74LS574 15
7 14
8 13
9 12
10 11
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8 (LSB)
0.1µF
1 14
2 13
3
4 74HC04 11
69
7
Clock Input
(A/D CLK)
(RIN = 75Ω)
75
Figure 5. Typical Connection Diagram
Supply Current vs. Sampling Rate
mA
20
+DVS=+AVS=+5V
VIN = 1kHz
Ta=25°C
15
10
5 10 15 20 25 30MHz
Sampling Rate
Supply Current vs. Sampling Voltage
mA
20
15
10
5
Differential Linearity Error vs.
Input Signal Frequency
LSB
+DVS=+AVS=+5V
0.6 FS = 20.48MHz
Ta=25°C
0.4
0.2
4.0 4.5 5.0 5.5V
Supply Voltage
2 4 6 8 10MHz
Input Signal Frequency
Figure 6. Typical Performance Curves
SNR + THD vs. Input Signal Frequency
dB
46
42
38 +DVS=+AVS=+5V
FS = 20.48MHz
Ta=25°C
36
1 2 3 4 5 6 7MHz
Input Signal Frequency
5

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