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ADC912A 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADC912A은 전자 산업 및 응용 분야에서
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부품번호 ADC912A 기능
기능 CMOS Microprocessor-Compatible 12-Bit A/D Converter
제조업체 Analog Devices
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ADC912A 데이터시트, 핀배열, 회로
a
CMOS Microprocessor-Compatible
12-Bit A/D Converter
FEATURES
Low Cost
Low Transition Noise between Code
12-Bit Accurate
؎1/2 LSB Nonlinearity Error over Temperature
No Missing Codes at All Temperatures
10 s Conversion Time
Internal or External Clock
8- or 16-Bit Data Bus Compatible
Improved ESD Resistant Design
Latchup Resistant Epi-CMOS Processing
Low 95 mW Power Consumption
Space-Saving 24-Lead 0.3" DIP, or 24-Lead SOIC
APPLICATIONS
Data Acquisition Systems
DSP System Front End
Process Control Systems
Portable Instrumentation
GENERAL DESCRIPTION
The ADC912A is a monolithic 12-bit accurate CMOS A/D
converter. It contains a complete successive-approximation A/D
converter built with a high-accuracy D/A converter, a precision
bipolar transistor high-speed comparator, and successive-
approximation logic including three-state bus interface for logic
compatibility. The accuracy of the ADC912A results from the
addition of precision bipolar transistors to Analog Devices’
advanced-oxide isolated silicon-gate CMOS process. Particular
attention was paid to the reduction of transition noise between
adjacent codes achieving a 1/6 LSB uncertainty. The low noise
design produces the same digital output for dc analog inputs
ADC912A
FUNCTIONAL BLOCK DIAGRAM
AGND VREFIN
AIN
12-BIT DAC
5k
ADC912A
SUCCESSIVE
APPROXIMATION
REGISTER
12-BIT LATCH
48
MULTIPLEXER
8
THREE-STATE
OUTPUT
DRIVERS
THREE-STATE
OUTPUT
DRIVERS
CONTROL
LOGIC
CLOCK
OSCILLATOR
VDD
VSS
BUSY
CS
RD
HBEN
CLK OUT
CLK IN
D11 D8
D7 D4 DGND D3/11 D0/8
not located at a transition voltage, see Figures 1 and 2. NPN
digital output transistors provide excellent bus interface timing,
125 ns access and bus disconnect time which results in faster
data transfer without the need for wait states. An external
1.25 MHz clock provides a 10 µs conversion time.
In stand-alone applications an internal clock can be used with
external crystal.
An external negative five-volt reference sets the 0 V to 10 V
input range. Plus 5 V and minus 12 V power supplies result in
95 mW of total power consumption.
256
256 SUCCESSIVE
CONVERSIONS
192 WITH
AIN = 4.99756V
128
100
90
64
0
2045 2046 2047 2048 2049
OUTPUT CODE – Decimal
Figure 1. Code Repetition
10
0%
TRANSITION NOISE
ANALOG INPUT
Figure 2. Transition Noise Cross Plot
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001




ADC912A pdf, 반도체, 판매, 대치품
ADC912A
ABSOLUTE MAXIMUM RATINGS
(TA = 25°C, unless otherwise noted)
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VSS to DGND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V
VREFIN to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . VSS to VDD
AGND to DGND . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
AIN to AGND . . . . . . . . . . . . . . . . . . . . . . . . –15 V to +15 V
Digital Input Voltage to DGND,
Pins 17, 19–21 . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Digital Output Voltage to DGND,
Pins 4–11, 13–16, 18, 22 . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Extended Industrial: ADC912A/F . . . . . . . –40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Maximum Junction Temperature (TJ max) . . . . . . . . . . 150°C
Package Power Dissipation . . . . . . . . . . . . . . (TJ max–TA)/θJA
Thermal Resistance θJA
Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
SOIC-24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C
Model
ADC912AFP
ADC912AFS
Temperature
Range
–40°C to +85°C
–40°C to +85°C
ORDERING GUIDE
INL
(LSB)
±1
±1
Package Description
24-Lead Narrow-Body Plastic
24-Lead Wide-Body SOIC
Package
Option
N-24
R-24
Table I. Analog Input to Digital Output Code Conversion
Analog Input Voltage
0 V to 10 V –10 V to +10 V
+FS – 1 LSB
+FS – 1 1/2 LSB
9.9976
9.9964
9.99951
9.9927
Midscale + 1/2 LSB 5.0012
Midscale
5.0000
0.0024
0.0000
–FS + 1/2 LSB
–FS
0.0012
0.0000
–9.9976
–10.000
*The symbol”φ” indicates a 0 or 1 with equal probability.
Output Code*
DB11 (MSB) DB0 (LSB)
1111 1111 1111
1 1 1 1 1 1 1 1 1111φ
1000 0000 000φ
1000 0000 0000
0000 0000 000φ
0000 0000 0000
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADC912A features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– REV. B

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ADC912A 전자부품, 판매, 대치품
0.4
0.2
0
0.2
0.4
0
1024
2048
3072
4096
DIGITAL OUTPUT CODE
TPC 1. Nonlinearity Error vs. Digital
Output Code
Typical Performance CharacteristicsADC912A
5
4
3
2
1
0
1
2
3
4
5
75
50 25 0 25 50 75 100 125
TEMPERATURE C
TPC 2. Offset Error vs. Temperature
6
5
4
3
2
1
0
1
2
3
4
75
50 25 0 25 50 75 100 125
TEMPERATURE C
TPC 3. Gain Error vs. Temperature
6
5 VDD @ 5.25V
4
3
2
CS, RD = LOGIC HIGH
AIN = 10V
1 CLK = 1MHz XTAL
0
1
2
ISS @ V SS = 15.75V
3
4
75
50 25 0 25 50 75
TEMPERATURE C
100 125
TPC 4. Supply Current vs.
Temperature
80
PDISS = IDD ؋ 5 + ISS ؋ 12
COUT = 20pF
fCONV = 1/13 fCLK IN
TA = 25 C
60 EXT CLK IN
40
0
1k 10k 100k 1M
CLK IN FREQUENCY Hz
TPC 5. Power Dissipation vs. CLK IN
Frequency
50
40
30
ISINK
20
10
0
10
20 ISOURCE
30
40
50
0
1234
VO OUTPUT VOLTAGE Volts
5
TPC 6. Digital Output Current vs.
Output Voltage
256
256 SUCCESSIVE
CONVERSIONS
192 WITH
AIN = 4.99756V
128
64
0
2045 2046 2047 2048 2049
OUTPUT CODE Decimal
TPC 7. Code Repetition
100
90
10
0%
TRANSITION NOISE
ANALOG INPUT
TPC 8. Transition Noise Cross Plot
4 VDD = +5V
VSS = 12V
TA = 25؇C
2
0
2
4
20
15 10
5
CONVERSION TIME s
0
TPC 9. Linearity Error vs. Conversion
Time
REV. B
–7–

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