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PDF HSP9501 Data sheet ( Hoja de datos )
| Número de pieza | HSP9501 | |
| Descripción | Programmable Data Buffer | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
HSP9501
January 1999 File Number 2786.4
Programmable Data Buffer
The HSP9501 is a 10-Bit wide programmable data buffer
designed for use in high speed digital systems. Two different
modes of operation can be selected through the use of the
MODSEL input. In the delay mode, a programmable data
pipeline is created which can provide 2 to 1281 clock cycles
of delay between the input and output data. In the data
recirculate mode, the output data path is internally routed
back to the input to provide a programmable circular buffer.
The length of the buffer or amount of delay is programmed
through the use of the 11-bit Length Control Input Port (LC0-
10) and the Length Control Enable (LCEN). An 11-bit value
is applied to the LC0-10 inputs, LCEN is asserted, and the
next selected clock edge loads the new count value into the
Length Control Register. The delay path of the HSP9501
consists of two registers with a programmable delay RAM
between them, therefore, the value programmed into the
Length Control Register is the desired length - 2. The range
of values which can be programmed into the Length Control
Register are from 0 to 1279, which in turn results in an
overall range of programmable delays from 2 to 1281.
Clock select logic is provided to allow the use of a positive or
negative edge system clock as the CLK input to the
HSP9501. The active edge of the CLK input is controlled
through the use of the CLKSEL input. All synchronous timing
(i.e., data setup, hold, and output delays) are relative to the
clock edge selected by CLKSEL. An additional clock enable
input (CLKEN) provides a means of disabling the internal
clock and holding the existing contents temporarily. All
outputs of the HSP9501 are three-state outputs to allow
direct interfacing to system or multi-use busses.
The HSP9501 is recommended for digital video processing
or any applications which require a programmable delay or
circular data buffer.
Features
• DC to 32MHz Operating Frequency
• Programmable Buffer Length from 2 to 1281 Words
• Supports Data Words to 10-Bits
• Clock Select Logic for Positive or Negative Edge
System Clocks
• Data Recirculate or Delay Modes of Operation
• Expandable Data Word Width or Buffer Length
• Three-State Outputs
• TTL Compatible Inputs/Outputs
• Low Power CMOS
Applications
• Sample Rate Conversion
• Data Time Compression/Expansion
• Software Controlled Data Alignment
• Programmable Serial Data Shifting
• Audio/Speech Data Processing Video/Image Processing
Video/Image Processing
• 1-H Delay Line of 910 NTSC, 1135 PAL or 1280 Samples:
- High Resolution Monitor Delay Line
- Comb Filter Designs
- Progressive Scanning Display
- TV Standards Conversion
- Image Processing
Ordering Information
PART NUMBER
HSP9501JC-25
HSP9501JC-32
TEMP.
RANGE (oC)
PACKAGE
0 to 70 44 Ld PLCC
0 to 70 44 Ld PLCC
HSP9501JC-2596
0 to 70
44 Ld PLCC
Tape and Reel
PKG.
NO.
N44.65
N44.65
N44.65
191
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
HSP9501
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or Voltage Applied . . . . . . . .GND -0.5V to VCC +0.5V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.75V to 5.25V
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
45.2
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(PLCC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications VCC = 5.0V +5%, TA = 0oC to 70oC, Commercial
PARAMETER
SYMBOL
TEST CONDITIONS
MIN MAX
UNITS
Logical One Input Voltage
Logical Zero Input Voltage
Output HIGH Voltage
Output LOW Voltage
Input Leakage Current
Output Leakage Current
Standby Current
Operating Power Supply Current
Input Capacitance
Output Capacitance
VIH
VIL
VOH
VOL
II
IO
ICCSB
ICCOP
CIN
CO
VCC = 5.25V
VCC = 4.75V
IOH = -4mA VCC = 4.75V
IOL = +4.0mA VCC = 4.75V
VIN = GND or VCC VCC = 5.25V
VOUT = GND or VCC = 5.25V
VIN = VCC or GND, VCC = 5.25V, Note 3
f = 25MHz, VIN = VCC or GND
VCC = 5.25V, Notes 2, 3
FREQ = 1MHz, VCC = Open, All
measurements are referenced to device
GND
2.0
-
2.4
-
-10
-10
-
-
-
-
-
0.8
-
0.4
10
10
500
125
10
10
V
V
V
V
µA
µA
µA
mA
pF
pF
AC Electrical Specifications VCC = 5.0V ±5%, TA = 0oC to +70oC, Commercial, (Note 5)
-32 -25
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
Clock Period
Clock Pulse Width High
Clock Pulse Width Low
Data Input Setup Time
Data Input Hold Time
Output Enable Time
Output Disable Time
CLKEN to Clock Setup
CLKEN to Clock Hold
LC0-10 Setup Time
LC0-10 Hold Time
LCEN to Clock Setup
LCEN to Clock Hold
tCP 31 - 40 -
t PWH
12
-
15
-
t PWL
12
-
- 15
tDS 10 - 12 -
tDH 2 - 2 -
t ENA
-
20
-
25
t DIS
-
24
-
25
tES 10 - 12 -
tEH 2 - 2 -
tLS 10 - 13 -
tLH 2 - 2 -
t LES
10
-
13
-
t LEH
2
-
2
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
-
-
-
-
-
-
Note 4
-
-
-
-
-
-
195
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| PDF Descargar | [ Datasheet HSP9501.PDF ] | |
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