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부품번호 HUF75333P3 기능
기능 66A/ 55V/ 0.016 Ohm. N-Channel UltraFET Power MOSFETs
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HUF75333P3 데이터시트, 핀배열, 회로
HUF75333G3, HUF75333P3, HUF75333S3S
Data Sheet
June 1999 File Number 4362.5
66A, 55V, 0.016 Ohm. N-Channel UltraFET
Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET™ process.
This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching convertors, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA75333.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75333G3
TO-247
75333G
HUF75333P3
TO-220AB
75333P
HUF75333S3S
TO-263AB
75333S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75333S3ST.
Packaging
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
Features
• 66A, 55V
• Simulation Models
- Temperature Compensated PSPICE® and SABER©
Models
- SPICE and SABER Thermal Impedance Models
Available on the WEB at:
www.Intersil.com/families/models.htm
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-220AB
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
DRAIN
(TAB)
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
103
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER© is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999




HUF75333P3 pdf, 반도체, 판매, 대치품
HUF75333G3, HUF75333P3, HUF75333S3S
Typical Performance Curves (Continued)
1000
VGS = 10V
TC = 25oC
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I25
175 - TC
150
100
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
50
10-5
10-4
10-3
10-2
10-1
100
101
t, PULSE WIDTH (s)
FIGURE 4. PEAK CURRENT CAPABILITY
500
TJ = MAX RATED
TC = 25oC
100
100µs
10 1ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
VDSS(MAX) = 55V
1
1 10
10ms
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
200
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
500 If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
100
STARTING TJ = 25oC
STARTING TJ = 150oC
10
0.001
0.01
0.1
1
10
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
150
VGS = 20V
VGS = 10V
120
VGS = 7V
90 VGS = 6V
60
30
0
0
VGS = 5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
1.5 3.0 4.5 6.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
7.5
FIGURE 7. SATURATION CHARACTERISTICS
150
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
120 VDD = 15V
90
60
-55oC
25oC
175oC
30
0
0 1.5 3.0 4.5 6.0
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
7.5
106

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HUF75333P3 전자부품, 판매, 대치품
HUF75333G3, HUF75333P3, HUF75333S3S
PSPICE Electrical Model
.SUBCKT HUF75333 2 1 3 ; rev 02/24/99
CA 12 8 1.8e-9
CB 15 14 1.73e-9
CIN 6 8 1.19e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 58.85
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
GATE
1
LDRAIN 2 5 1e-9
LGATE 1 9 1e-9
LSOURCE 3 7 1e-9
K1 LSOURCE LGATE 0.0085
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 4.50e-3
RGATE 9 20 1
RLDRAIN 2 5 10
RLGATE 3 7 10
RLSOURCE 3 7 11
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 5.95e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
DPLCAP 5
10
RSLC2
RSLC1
51
5
51
ESLC
DBREAK
11
LDRAIN
DRAIN
2
RLDRAIN
-
LGATE
ESG
6
8
+ EVTHRES
+ 19 -
EVTEMP
8
RGATE + 18 - 6
9 20 22
RLGATE
CIN
S1A
12 13
8
S2A
14
13
15
50
RDRAIN
16
21
EBREAK
+
17
18
-
MWEAK
DBODY
MMED
MSTRO
87
RSOURCE
LSOURCE
SOURCE
3
RLSOURCE
RBREAK
17 18
S1B
S2B
CA 13 CB
+ + 14
EGS
6
8
-
EDS
5
8
-
RVTEMP
19
IT -
VBAT
+
8
22
RVTHRES
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*180),4))}
.MODEL DBODYMOD D (IS = 1.3e-12 RS =0.003 TRS1 = 2.7e-3 TRS2 = 7e-7 CJO = 1.7e-9 TT = 40e-8 M = 0.45 IKF= 20 XTI= 6)
.MODEL DBREAKMOD D (RS = 0.1e-1 TRS1 = -4e-4 TRS2 = 1.55e-5 IKF= 1e-5)
.MODEL DPLCAPMOD D (CJO = 1.8e-9 IS = 1e-30 N = 1 M = 0.9 vj= 1.45)
.MODEL MMEDMOD NMOS (VTO = 3.183 KP = 2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1)
.MODEL MSTROMOD NMOS (VTO = 3.66 KP = 51.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.703 KP = 0.008 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 10 )
.MODEL RBREAKMOD RES (TC1 = 1.05e-3 TC2 = 4.5e-7)
.MODEL RDRAINMOD RES (TC1 = 1.16e-2 TC2 = 1.7e-5)
.MODEL RSLCMOD RES (TC1 = 3.96e-3 TC2 = 2.7e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-5)
.MODEL RVTHRESMOD RES (TC = -2.8e-3 TC2 = -1.0e-6)
.MODEL RVTEMPMOD RES (TC1 = -2.75e-3 TC2 = 0.5e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8 VOFF= -3)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3 VOFF= -8)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0 VOFF= 0.5)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= 0)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
109

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