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HUF75343P3 데이터시트 PDF




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부품번호 HUF75343P3 기능
기능 75A/ 55V/ 0.009 Ohm/ N-Channel UltraFET Power MOSFETs
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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HUF75343P3 데이터시트, 핀배열, 회로
HUF75343G3, HUF75343P3, HUF75343S3,
HUF75343S3S
Data Sheet
March 2003
75A, 55V, 0.009 Ohm, N-Channel UltraFET
Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET® process. This
advanced process technology
achieves the lowest possible on-
resistance per silicon area, resulting in outstanding
performance. This device is capable of withstanding high
energy in the avalanche mode and the diode exhibits very
low reverse recovery time and stored charge. It was
designed for use in applications where power efficiency is
important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery
operated products.
Formerly developmental type TA75343.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75343G3
TO-247
75343G
HUF75343P3
TO-220AB
75343P
HUF75343S3
TO-262AA
75343S
HUF75343S3S
TO-263AB
75343S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75343S3ST.
Packaging
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
Features
• 75A, 55V
• Simulation Models
- Temperature Compensating PSPICE® and SABER™
Models
- Thermal Impedance PSPICE™ and SABER Models
Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-220AB
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
DRAIN
(TAB)
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
JEDEC TO-262AA
SOURCE
DRAIN
GATE
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2003 Fairchild Semiconductor Corporation
HUF75343G3, HUF75343P3, HUF75343S3, HUF75343S3S Rev. B1




HUF75343P3 pdf, 반도체, 판매, 대치품
HUF75343G3, HUF75343P3, HUF75343S3, HUF75343S3S
Typical Performance Curves (Continued)
2000
1000
VGS = 10V
TC = 25oC
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I25
175 - TC
150
100 TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
50
10-5
10-4
1000
10-3
10-2
t, PULSE WIDTH (s)
10-1
FIGURE 4. PEAK CURRENT CAPABILITY
100
101
TJ = MAX RATED
TC = 25oC
500
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
100 100µs
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
VDSS(MAX) = 55V
1
1
10
1ms
10ms
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
200
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
100
STARTING TJ = 25oC
STARTING TJ = 150oC
10
0.01
0.1 1
tAV, TIME IN AVALANCHE (ms)
10
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
150
VGS = 20V
VGS = 10V
VGS = 7V
100
VGS = 6V
50
0
0
VGS = 5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
0.5 1.0 1.5 2.0 2.5 3.0 3.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
4.0
FIGURE 7. SATURATION CHARACTERISTICS
150
VDD = 15V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
100
-55oC
175oC
50
25oC
0
0 1.5 3.0 4.5 6.0
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
7.5
©2003 Fairchild Semiconductor Corporation
HUF75343G3, HUF75343P3, HUF75343S3, HUF75343S3S Rev. B1

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HUF75343P3 전자부품, 판매, 대치품
HUF75343G3, HUF75343P3, HUF75343S3, HUF75343S3S
PSPICE Electrical Model
.SUBCKT HUF75343 2 1 3 ; rev 9Feb99
CA 12 8 3.95e-9
CB 15 14 5.05e-9
CIN 6 8 2.68e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 58.39
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
GATE
1
LDRAIN 2 5 1e-9
LGATE 1 9 2.60e-9
LSOURCE 3 7 1.1e-9
KGATE LSOURCE LGATE 0.0085
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 0.70e-3
RGATE 9 20 0.36
RLDRAIN 2 5 10
RLGATE 1 9 26
RLSOURCE 3 7 11
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 4.79e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
DPLCAP 5
10
RSLC2
RSLC1
51
5
51
ESLC
DBREAK
11
LDRAIN
DRAIN
2
RLDRAIN
-
LGATE
ESG
6
8
+ EVTHRES
+ 19 -
EVTEMP
8
RGATE + 18 - 6
9 20 22
RLGATE
CIN
S1A
12 13
8
S2A
14
13
15
50
RDRAIN
16
21
EBREAK
+
17
18
-
MWEAK
DBODY
MMED
MSTRO
87
RSOURCE
LSOURCE
SOURCE
3
RLSOURCE
RBREAK
17 18
S1B
S2B
CA 13 CB
+ + 14
EGS
6
8
-
EDS
5
8
-
RVTEMP
19
IT -
VBAT
+
8
22
RVTHRES
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*609),2.5))}
.MODEL DBODYMOD D (IS = 2.35e-12 RS = 2.21e-3 TRS1 = 2.47e-3 TRS2 = 3.97e-11 CJO = 6.34e-9 TT = 3.95e-8 M = 0.6)
.MODEL DBREAKMOD D (RS = 9.1e-2 TRS1 = -2.24e-4 TRS2 = 5.23e-6)
.MODEL DPLCAPMOD D (CJO = 2.15e-9 IS = 1e-30 N = 10 M= 0.73)
.MODEL MMEDMOD NMOS (VTO = 3.30 KP = 5.49 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.36)
.MODEL MSTROMOD NMOS (VTO = 3.87 KP = 145 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.92 KP = 0.05 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6 RS =.1)
.MODEL RBREAKMOD RES (TC1 = 1.04e-3 TC2 = 3.43e-7)
.MODEL RDRAINMOD RES (TC1 = 4.44e-2 TC2 = 8.04e-5)
.MODEL RSLCMOD RES (TC1 = 1.02e-4 TC2 = 2.07e-6)
.MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -3.49e-3 TC2 = -1.27e-5)
.MODEL RVTEMPMOD RES (TC1 = -1.93e-3 TC2 = 1.38e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.90 VOFF= -3.90)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.90 VOFF= -6.90)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.39 VOFF= 3.39)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.39 VOFF= 0.39)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2003 Fairchild Semiconductor Corporation
HUF75343G3, HUF75343P3, HUF75343S3, HUF75343S3S Rev. B1

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