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HUF76105SK8 데이터시트 PDF




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부품번호 HUF76105SK8 기능
기능 5.5A/ 30V/ 0.050 Ohm/ N-Channel/ Logic
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HUF76105SK8 데이터시트, 핀배열, 회로
Data Sheet
HUF76105SK8
January 2003
5.5A, 30V, 0.050 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
This N-Channel power MOSFET is
manufactured using the innovative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery-
operated products.
Formerly developmental type TA76105.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76105SK8
MS-012AA
76105SK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76105SK8T.
Features
• Logic Level Gate Drive
• 5.5A, 30V
• Ultra Low On-Resistance, rDS(ON) = 0.050
• Simulation Models
- Temperature Compensated PSPICE® and SABER
Electrical Models
- SPICE and SABER Thermal Impedance Models
Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
NC(1)
DRAIN(8)
SOURCE(2)
DRAIN(7)
SOURCE(3)
DRAIN(6)
GATE(4)
DRAIN(5)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1




HUF76105SK8 pdf, 반도체, 판매, 대치품
HUF76105SK8
Typical Performance Curves (Continued)
10
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
1 0.05
0.02
0.01
0.1
RθJA = 50oC/W
PDM
0.01
0.001
10-5
SINGLE PULSE
10-4
10-3
10-2
10-1
100
t, RECTANGULAR PULSE DURATION (s)
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
101 102
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
103
500
100
VGS = 10V VGS = 5V
10
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
1
10-5
10-4
10-3
RθJA = 50oC/W
TC = 25oC
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I25
150 - TA
125
10-2
10-1
100
101
102
103
t, PULSE WIDTH (s)
FIGURE 4. PEAK CURRENT CAPABILITY
200
100
10
OPERATION IN THIS
1 AREA MAY BE
LIMITED BY rds(ON)
TJ
TA
=
=
MAX RATED
25oC
100µs
1ms
10ms
0.1
1
BVDSS MAX = 30V
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
20
STARTING TJ = 25oC
10
STARTING TJ = 150oC
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
1
0.01
0.1
1
10
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1

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HUF76105SK8 전자부품, 판매, 대치품
HUF76105SK8
Test Circuits and Waveforms (Continued)
VGS
Ig(REF)
VDS
RL
DUT
+
VDD
-
FIGURE 19. GATE CHARGE TEST CIRCUIT
VDD
VDS
Qg(TOT)
VGS
VGS = 1V
0 Qg(TH)
Qgs
Ig(REF)
0
Qg(5)
Qgd
VGS = 5V
VGS = 10V
FIGURE 20. GATE CHARGE WAVEFORMS
VDS
RL
VGS
VGS
RGS
DUT
+
VDD
-
FIGURE 21. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJM, and the thermal
resistance of the heat dissipating path determines the maximum
allowable device power dissipation, PDM, in an application.
Therefore the application’s ambient temperature, TA(oC), and
thermal resistance RθJA (oC/W) must be reviewed to ensure that
TJM is never exceeded. Equation 1 mathematically represents
the relationship and serves as the basis for establishing the rating
of the part.
PDM = (---T----J--Z-M---θ---J-–---A-T----A-----)
(EQ. 1)
In using surface mount devices such as the SOP-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power dissipation
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 22. SWITCHING TIME WAVEFORM
ratings. Precise determination of PDM is complex and influ-
enced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1

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