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PDF Am29LV320DT90EI Data sheet ( Hoja de datos )
| Número de pieza | Am29LV320DT90EI | |
| Descripción | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only/ Boot Sector Flash Memory | |
| Fabricantes | Advanced Micro Devices | |
| Logotipo |  |
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Am29LV320D
Data Sheet
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number 23579 Revision C Amendment +6 Issue Date November 15, 2004
1 page  
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Special Package Handling Instructions .................................... 8
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Table 1. Am29LV320D Device Bus Operations ..............................11
Word/Byte Configuration ........................................................ 11
Requirements for Reading Array Data ................................... 11
Writing Commands/Command Sequences ............................ 12
Accelerated Program Operation .......................................... 12
Autoselect Functions ........................................................... 12
Standby Mode ........................................................................ 12
Automatic Sleep Mode ........................................................... 13
RESET#: Hardware Reset Pin ............................................... 13
Output Disable Mode .............................................................. 13
Table 2. Top Boot Sector Addresses (Am29LV320DT) ..................13
Table 3. Top Boot SecSiTM Sector Addresses................................ 14
Table 4. Bottom Boot Sector Addresses (Am29LV320DB) .............15
Table 5. Bottom Boot SecSiTM Sector Addresses .......................... 16
Autoselect Mode ..................................................................... 16
Table 6. Autoselect Codes (High Voltage Method) ........................16
Sector/Sector Block Protection and Unprotection .................. 17
Table 7. Top Boot Sector/Sector Block Addresses
for Protection/Unprotection .............................................................17
Table 8. Bottom Boot Sector/Sector Block
Addresses for Protection/Unprotection ...........................................17
Write Protect (WP#) ................................................................ 18
Temporary Sector Unprotect .................................................. 18
Figure 1. Temporary Sector Unprotect Operation........................... 18
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 19
SecSiTM Sector (Secured Silicon) Flash Memory Region ....... 20
Factory Locked: SecSi Sector Programmed
and Protected at the Factory ............................................... 20
Customer Lockable: SecSi Sector NOT Programmed
or Protected at the Factory .................................................. 20
Figure 3. SecSi Sector Protect Verify.............................................. 21
Hardware Data Protection ...................................................... 21
Low VCC Write Inhibit ......................................................... 21
Write Pulse “Glitch” Protection ............................................ 21
Logical Inhibit ...................................................................... 21
Power-Up Write Inhibit ......................................................... 21
Common Flash Memory Interface (CFI) . . . . . . . 21
Table 9. CFI Query Identification String .......................................... 22
Table 10. System Interface String................................................... 22
Table 11. Device Geometry Definition ............................................ 23
Table 12. Primary Vendor-Specific Extended Query ...................... 24
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................ 25
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Table 13. Autoselect Codes ............................................................25
Enter SecSiTM Sector/Exit SecSi Sector
Command Sequence .............................................................. 26
Byte/Word Program Command Sequence ............................. 26
Unlock Bypass Command Sequence .................................. 26
Figure 4. Program Operation ......................................................... 27
Chip Erase Command Sequence ........................................... 27
Sector Erase Command Sequence ........................................ 27
Erase Suspend/Erase Resume Commands ........................... 28
Figure 5. Erase Operation.............................................................. 28
Command Definitions ............................................................. 29
Table 14. Am29LV320D Command Definitions ............................. 29
Write Operation Status . . . . . . . . . . . . . . . . . . . . 30
DQ7: Data# Polling ................................................................. 30
Figure 6. Data# Polling Algorithm .................................................. 30
RY/BY#: Ready/Busy# ............................................................ 31
DQ6: Toggle Bit I .................................................................... 31
Figure 7. Toggle Bit Algorithm........................................................ 31
DQ2: Toggle Bit II ................................................................... 32
Reading Toggle Bits DQ6/DQ2 ............................................... 32
DQ5: Exceeded Timing Limits ................................................ 32
DQ3: Sector Erase Timer ....................................................... 32
Table 15. Write Operation Status ................................................... 33
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34
Figure 8. Maximum Negative Overshoot Waveform ...................... 34
Figure 9. Maximum Positive Overshoot Waveform........................ 34
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 34
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 10. ICC1 Current vs. Time (Showing Active and
Automatic Sleep Currents) ............................................................. 36
Figure 11. Typical ICC1 vs. Frequency ............................................ 36
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 12. Test Setup.................................................................... 37
Table 16. Test Specifications ......................................................... 37
Figure 13. Input Waveforms and Measurement Levels ................. 37
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 14. Read Operation Timings ............................................... 38
Figure 15. Reset Timings ............................................................... 39
Word/Byte Configuration (BYTE#) ............................................. 40
Figure 16. BYTE# Timings for Read Operations............................ 40
Figure 17. BYTE# Timings for Write Operations............................ 40
Erase and Program Operations ................................................. 41
Figure 18. Program Operation Timings.......................................... 42
Figure 19. Chip/Sector Erase Operation Timings .......................... 43
Figure 20. Data# Polling Timings (During Embedded Algorithms). 44
Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 45
Figure 22. DQ2 vs. DQ6................................................................. 45
Temporary Sector Unprotect ..................................................... 46
Figure 23. Temporary Sector Unprotect Timing Diagram .............. 46
Figure 24. Accelerated Program Timing Diagram.......................... 46
Figure 25. Sector/Sector Block Protect and
Unprotect Timing Diagram ............................................................. 47
Alternate CE# Controlled Erase and Program Operations ........ 48
Figure 26. Alternate CE# Controlled Write
(Erase/Program) Operation Timings .............................................. 49
Erase And Programming Performance . . . . . . . 50
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 50
TSOP and BGA Package Capacitance . . . . . . . . 50
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51
FBD048—48-ball Fine-Pitch Ball Grid Array (FBGA)
6 x 12 mm package ................................................................... 51
TS 048—48-Pin Standard TSOP ............................................... 52
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 53
November 15, 2004
Am29LV320D
5
5 Page 
DEVICE BUS OPERATIONS
This section describes the requirements and
use of the device bus operations, which are ini-
tiated through the internal command register.
The command register itself does not occupy
any addressable memory location. The register
is a latch used to store the commands, along
with the address and data information needed
to execute the command. The contents of the
register serve as inputs to the internal state
machine. The state machine outputs dictate the
function of the device. Table 1 lists the device
bus operations, the inputs and control levels
they require, and the resulting output. The fol-
lowing subsections describe each of these oper-
ations in further detail.
Table 1. Am29LV320D Device Bus Operations
DQ8–DQ15
Operation
Read
Write
Accelerated Program
Standby
Output Disable
Reset
WE
CE# OE# #
L LH
LHL
LHL
VCC ±
0.3 V
X
X
L HH
XXX
Sector Protect (Note 2) L H L
Sector Unprotect
(Note 2)
Temporary Sector
Unprotect
LHL
XXX
RESET WP#/AC
#C
H L/H
H (Note 3)
H
VCC ±
0.3 V
VHH
H
Addresses
(Note 2)
AIN
AIN
AIN
X
DQ0–
DQ7
BYTE
#
= VIH
DOUT
DOUT
(Note 4) (Note 4)
(Note 4) (Note 4)
High-Z High-Z
H L/H
X High-Z High-Z
L L/H
X High-Z High-Z
VID
L/H
SA, A6 = L,
A1 = H, A0 = L
(Note 4)
X
VID
(Note 3)
SA, A6 = H,
A1 = H, A0 = L
(Note 4)
X
VID (Note 3)
AIN (Note 4) (Note 4)
BYTE#
= VIL
DQ8–DQ14
= High-Z,
DQ15 = A-1
High-Z
High-Z
High-Z
X
X
High-Z
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 11.5–12.5 V, X = Don’t Care, SA
= Sector Address, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Addresses are A20:A0 in word mode (BYTE# = VIH), A20:A-1 in byte mode (BYTE# = VIL).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See
“Sector/Sector Block Protection and Unprotection” on page 17.
3. If WP#/ACC = VIL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot
sector protection depends on whether they were last protected or unprotected using the method described in
“Sector/Sector Block Protection and Unprotection” on page 17. If WP#/ACC = VHH, all sectors are unprotected.
4. DIN or DOUT as required by command sequence, data polling, or sector protection algorithm.
Word/Byte Configuration
The BYTE# pin controls whether the device
data I/O pins operate in the byte or word con-
figuration. If the BYTE# pin is set at logic ‘1’,
the device is in word configuration, DQ0–DQ15
are active and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is
in byte configuration, and only data I/O pins
DQ0–DQ7 are active and controlled by CE# and
OE#. The data I/O pins DQ8–DQ14 are
tri-stated, and the DQ15 pin is used as an input
for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the sys-
tem must drive the CE# and OE# pins to VIL.
CE# is the power control and selects the de-
vice. OE# is the output control and gates array
data to the output pins. WE# should remain at
VIH. The BYTE# pin determines whether the de-
vice outputs array data in words or bytes.
November 15, 2004
Am29LV320D
11
11 Page | ||
| Páginas | Total 55 Páginas | |
| PDF Descargar | [ Datasheet Am29LV320DT90EI.PDF ] | |
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