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PDF CXP87948 Data sheet ( Hoja de datos )

Número de pieza CXP87948
Descripción CMOS 8-bit Single Chip Microcomputer
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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CXP87940/87948
CMOS 8-bit Single Chip Microcomputer
Description
The CXP87940/87948 is a CMOS 8-bit single chip
microcomputer which consists of A/D converter, serial
interface, timer/counter, time base timer, high
precision timing pattern generation circuit, PWM
output, VISS/VASS circuit, 32kHz timer/counter,
remote control reception circuit, VSYNC separator and
the measurement circuit which measures signals of
capstan FG and drum FG/PG and other servo
systems, as well as basic configurations like 8-bit
CPU, ROM, RAM and I/O port.
Also the CXP87940/87948 provides sleep/stop
functions which enable to lower power consumption.
100 pin QFP (PIastic)
Structure
Silicon gate CMOS IC
Features
A wide instruction set (213 instructions) which covers various types of data
— 16-bit operation/multiplication and division/Boolean bit operation instructions
Minimum instruction cycle
250ns at 16MHz operation (4.5V to 5.5V)
122µs at 32kHz operation (2.7V to 5.5V)
Incorporated ROM capacity 40K bytes (CXP87940), 48K bytes (CXP87948)
Incorporated RAM capacity 1376 bytes
Peripheral functions
— A/D converter
8 bits, 12 channels, successive approximation method
(Conversion time of 20.0µs at 16MHz)
— Serial Interface
Incorporated buffer RAM (Auto transfer for 1 to 32 bytes), 1 channel
Incorporated 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
Incorporated two-wire 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
— Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer,
32kHz timer/counter
— High-precision timing pattern generator PPG: maximum of 19 pins, 32 stages programmable
RTG: 5 pins, 2 channels
— PWM/DA gate output
PWM: 12 bits, 2 channels (Repetitive frequency of 62kHz at 16MHz)
DA gate pulse output: 13 bits, 4 channels
— Servo input control
Capstan FG, drum FG/PG, CTL input
— VSYNC separator
— FRC capture unit
Incorporated 26-bit and 8-stage FIFO
— PWM output
14 bits
— VISS/VASS circuit
Pulse duty auto detection circuit
— Remote control reception circuit
8-bit pulse measurement counter with on-chip 6-stage FIFO
Interruption
22 factors, 15 vectors, multi-interruption possible
Standby mode
Sleep/stop
Package
100-pin plastic QFP
Piggyback/evaluator
CXP87800 100-pin ceramic PQFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E96X01-PS

1 page




CXP87948 pdf
CXP87940/87948
Symbol
PG0/CFG
PG1/DFG
PG2/DPG
I/O
Input/Input
Input/Input
Input/Input
PG3/PBCTL Input/Input
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
Input/Input
Input/Input
Input/Input
Input/Input
PH0 to PH7 Output
PI1/RMC
PI2/PWM
PI3/TO/
DDO/ADJ
PI4/INT1/
NMI
PI5/SCK1
PI6/SO1
PI7/SI1
PJ0 to PJ7
I/O/Input
I/O/Output
I/O/Output/
Output/Output
I/O/Input/Input
I/O/I/O
I/O/Output
I/O/Input
I/O
EXTAL
XTAL
TEX
TX
RST
MP
AVDD
AVREF
AVss
VDD
NC
Vss
Input
Output
Input
Output
Input
Input
Input
(Port G)
8-bit input port.
(8 pins)
Description
Capstan FG input.
Drum FG input.
Drum PG input.
Playback CTL pulse input.
External event input for timer/counter.
Composite sync signal input.
(2 pins)
External input to FRC capture unit.
(2 pins)
(Port H)
8-bit output port. N-ch open drain output of medium drive voltage (12V)
and large current (12mA).
(8 pins)
Remote control reception circuit input.
14-bit PWM output.
(Port I)
7-bit I/O port.
I/O port can be
set in a unit of
single bits.
(7 pins)
Timer/counter, CTL duty detection, 32kHz oscillation
adjustment output.
Input to request external interruption and
non-maskable interruption. Active at the falling edge.
Serial clock (CH1) I/O.
Serial data (CH1) output.
Serial data (CH1) input.
(Port J)
8-bit I/O port. I/O and standby release input function can be set in a
unit of single bits.
Connects a crystal oscillator for system clock. When supplying the
external clock, input the external clock to EXTAL and input the
opposite phase clock to XTAL .
Connects a crystal oscillator for 32kHz timer/counter clock. The 32kHz
crystal oscillator is inserted between TEX and TX. When used as event
input, connect the clock source to TEX and leave TX open.
System reset; active at Low level.
Test mode input. Always connect to GND.
Positive power supply of A/D converter.
Reference voltage input of A/D converter.
GND of A/D converter.
Positive power supply. Connect VDD pin to VDD.
No connected. Connect to VDD in normal operation.
GND. Connect both Vss pins to GND.
–5–

5 Page





CXP87948 arduino
CXP87940/87948
Pin
PI2/PWM
PI3/TO/
DDO/ADJ
2 pins
Port I
Circuit format
Port I function
selection
“0” when reset
PI2...14-bit PWM
PI3...Timer/counter,
CTL duty detection circuit,
32kHz timer
Port I data
MPX
Port I direction
“0” when reset
Data bus
Port I
RD (Port I)
Port I data
When reset
Hi-Z
IP
PI1/RMC
PI4/INT1/NMI
PI7/SI1
3 pins
PI5/SCK1
PI6/SO1
2 pins
Port I direction
“0” when reset
Data bus
RD (Port I)
PI1...Remote control circuit
PI4...Interruption circuit
PI7...Serial interface CH1
Port I
Port I function
selection
“0” when reset
Serial interface
CH1
Port I data
MPX
Port I direction
“0” when reset
Data bus
RD (Port I)
MPX
Serial interface CH1
Port J
Port J data
IP
Schmitt input
IP
PI6 is not Schmitt input.
Hi-Z
Hi-Z
PJ0 to PJ7
8 pins
Port J direction
“0” when reset
Data bus
RD
(PortJ)
Standby release
Edge detection
Data bus
RD (Port J direction)
– 11 –
IP
Hi-Z

11 Page







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