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AT27C256R-55PI 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT27C256R-55PI은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 AT27C256R-55PI 자료 제공

부품번호 AT27C256R-55PI 기능
기능 256K 32K x 8 OTP CMOS EPROM
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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AT27C256R-55PI 데이터시트, 핀배열, 회로
AT27C256R
Features
Fast Read Access Time - 45 ns
•• Low Power CMOS Operation
100 µA max. Standby
20 mA max. Active at 5 MHz
JEDEC Standard Packages
28-Lead 600-mil PDIP
32-Lead PLCC
28-Lead TSOP and SOIC
5V ± 10% Supply
High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
RapidProgramming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
•• Commercial and Industrial Temperature Ranges
Description
The AT27C256R is a low-power, high performance 262,144 bit one-time programma-
ble read only memory (OTP EPROM) organized 32K by 8 bits. It requires only one
5V power supply in normal read mode operation. Any byte can be accessed in less
than 45 ns, eliminating the need for speed reducing WAIT states on high performance
microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption, and fast
programming. Power consumption is typically only 8 mA in Active Mode and less
than 10 µA in Standby.
(continued)
256K (32K x 8)
OTP
CMOS
EPROM
Pin Configurations
Pin Name Function
A0 - A14 Addresses
O0 - O7 Outputs
CE Chip Enable
OE Output Enable
NC No Connect
PDIP, SOIC Top View
AT27C256R
PLCC Top View
TSOP Top View
Type 1
Note: PLCC Package Pins 1 and
17 are DON’T CONNECT.
0014G
3-125




AT27C256R-55PI pdf, 반도체, 판매, 대치품
DC and AC Operating Conditions for Read Operation
Operating
Temp. (Case)
VCC Supply
-45
Com. 0°C - 70°C
Ind. -40°C - 85°C
5V ± 10%
-55
0°C - 70°C
-40°C - 85°C
5V ± 10%
AT27C256R
-70 -90
0°C - 70°C 0°C - 70°C
-40°C - 85°C -40°C - 85°C
5V ± 10%
5V ± 10%
-12
0°C - 70°C
-40°C - 85°C
5V ± 10%
-15
0°C - 70°C
-40°C - 85°C
5V ± 10%
DC and Operating Characteristics for Read Operation
Symbol Parameter
Condition
Min Max Units
ILI
ILO
IPP1 (2)
Input Load Current
VIN = 0V to VCC
Output Leakage Current
VOUT = 0V to VCC
VPP (1) Read/Standby Current VPP = VCC
±1 µA
±5 µA
10 µA
ISB
VCC (1) Standby Current
ISB1 (CMOS), CE = VCC ± 0.3V
ISB2 (TTL), CE = 2.0 to VCC + 0.5V
100 µA
1 mA
ICC VCC Active Current
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
VOH Output High Voltage
f = 5 MHz, IOUT = 0 mA,
CE = VIL
IOL = 2.1 mA
IOH = -400 µA
20 mA
-0.6 0.8 V
2.0 VCC + 0.5 V
0.4 V
2.4 V
Notes: 1. VCC must be applied simultaneously or before VPP, 2. VPP may be connected directly to VCC, except during program-
and removed simultaneously or after VPP.
ming. The supply current would then be the sum of ICC and IPP.
AC Characteristics for Read Operation
AT27C256R
-45 -55 -70 -90 -12 -15
Symbol Parameter
Condition
Min Max Min Max Min Max Min Max Min Max Min Max Units
tACC (3)
tCE (2)
tOE (2, 3)
tDF (4, 5)
tOH
Address to
Output Delay
CE = OE
= VIL
CE to Output Delay OE = VIL
OE to Output Delay CE = VIL
OE or CE High to
Output Float, whichever occurred first
Output Hold from
Address, CE or OE,
whichever occurred first
45 55
45 55
20 25
20 20
70 90 120 150 ns
70 90 120 150 ns
30 30 35 40 ns
25 25 30 35 ns
7 7 7 0 0 0 ns
Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.
3-128 AT27C256R

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AT27C256R-55PI 전자부품, 판매, 대치품
AT27C256R
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Sym-
bol Parameter
Test
Limits
Conditions*(1) Min Max Units
tAS
tOES
tDS
tAH
tDH
tDFP
tVPS
tVCS
tPW
tOE
tPRT
Address Setup Time
OE Setup Time
Data Setup
Time
Address Hold Time
Data Hold Time
OE High to Out-
put Float Delay (2)
VPP Setup
Time
VCC Setup
Time
CE Program
Pulse Width (3)
Data
Valid from OE (2)
VPP Pulse Rise Time During
Programming
2 µs
2 µs
2 µs
0 µs
2 µs
0 130 ns
2 µs
2 µs
95 105 µs
150 ns
50 ns
*AC Conditions of Test:
Input Rise and Fall Times (10% to 90%)..............20 ns
Input Pulse Levels...................................0.45V to 2.4V
Input Timing Reference Level...................0.8V to 2.0V
Output Timing Reference Level................0.8V to 2.0V
Notes: 1. VCC must be applied simultaneously or before VPP
and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100%
tested. Output Float is defined as the point where
data is no longer driven — see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.
Rapid Programming Algorithm
A 100 µs CE pulse width is used to program. The address
is set to the first location. VCC is raised to 6.5V and VPP is
raised to 13.0V. Each address is first programmed with
one 100 µs CE pulse without verification. Then a verifica-
tion/reprogramming loop is executed for each address. In
the event a byte fails to pass verification, up to 10 succes-
sive 100 µs pulses are applied with a verification after
each pulse. If the byte fails to verify after 10 pulses have
been applied, the part is considered failed. After the byte
verifies properly, the next address is selected until all have
been checked. VPP is then lowered to 5.0V and VCC to
5.0V. All bytes are read again and compared with the origi-
nal data to determine if the device passes or fails.
Atmel’s 27C256R Integrated
Product Identification Code
Codes
Pins
Hex
A0 O7 O6 O5 O4 O3 O2 O1 O0 Data
Manufacturer 0 0 0 0 1 1 1 1 0 1E
Device Type 1 1 0 0 0 1 1 0 0 8C
3-131

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