|
|
PDF AT27C256R-70TI Data sheet ( Hoja de datos )
| Número de pieza | AT27C256R-70TI | |
| Descripción | 256K 32K x 8 OTP CMOS EPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AT27C256R-70TI (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
|
No Preview Available !
AT27C256R
Features
Fast Read Access Time - 45 ns
•• Low Power CMOS Operation
100 µA max. Standby
20 mA max. Active at 5 MHz
• JEDEC Standard Packages
28-Lead 600-mil PDIP
32-Lead PLCC
28-Lead TSOP and SOIC
• 5V ± 10% Supply
• High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
•• Commercial and Industrial Temperature Ranges
Description
The AT27C256R is a low-power, high performance 262,144 bit one-time programma-
ble read only memory (OTP EPROM) organized 32K by 8 bits. It requires only one
5V power supply in normal read mode operation. Any byte can be accessed in less
than 45 ns, eliminating the need for speed reducing WAIT states on high performance
microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption, and fast
programming. Power consumption is typically only 8 mA in Active Mode and less
than 10 µA in Standby.
(continued)
256K (32K x 8)
OTP
CMOS
EPROM
Pin Configurations
Pin Name Function
A0 - A14 Addresses
O0 - O7 Outputs
CE Chip Enable
OE Output Enable
NC No Connect
PDIP, SOIC Top View
AT27C256R
PLCC Top View
TSOP Top View
Type 1
Note: PLCC Package Pins 1 and
17 are DON’T CONNECT.
0014G
3-125
1 page  
AC Waveforms for Read Operation (1)
AT27C256R
Notes: 1. Timing measurement reference level is 1.5V for -45
and -55 devices. Input AC drive levels are VIL =
0.0V and VIH = 3.0V. Timing measurement refer-
ence levels for all other speed grades are VOL =
0.8V and VOH = 2.0V. Input AC drive levels are VIL
= 0.45V and VIH = 2.4V.
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid
without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer
driven.
Input Test Waveforms and Measurement Levels
For -45 and -55 devices only:
Output Test Load
tR, tF < 5 ns (10% to 90%)
For -70, -90, -12, and -15 devices:
tR, tF < 20 ns (10% to 90%)
Note:
CL= 100 pF including jig
capacitance, except for
the -45 and -55 devices,
where CL= 30 pF.
Pin Capacitance (f = 1MHz, T = 25°C) (1)
Typ
Max
Units
Conditions
CIN 4
6 pF VIN = 0V
COUT
8
12 pF VOUT = 0V
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
3-129
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AT27C256R-70TI.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AT27C256R-70TC | 256K 32K x 8 OTP CMOS EPROM | ATMEL Corporation |
| AT27C256R-70TI | 256K 32K x 8 OTP CMOS EPROM | ATMEL Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |