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AT27C520 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT27C520은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 AT27C520 자료 제공

부품번호 AT27C520 기능
기능 512K 64K x 8 Multiplexed Addresses/ Outputs OTP EPROM
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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AT27C520 데이터시트, 핀배열, 회로
Features
8-Bit Multiplexed Addresses/Outputs
Fast Read Access Time - 70 ns
Low Power CMOS Operation
– 20 mA max. Active at 5 MHz
20-Lead TSSOP Package
20-Lead SOIC Package
28-Lead TSOP Package
5V ± 10% Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
RapidProgramming Algorithm - 50 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Range
Description
The AT27C520 is a low-power, high performance 524,288 bit one-time programmable
read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches for
the 8 lower order address bits to multiplex with the 8 data bits. This minimizes system
chip count, reduces cost, and simplifies the design of multiplexed bus systems. It
requires only one 5V power supply in normal read mode operation. Any byte can be
accessed in less than 70 ns, eliminating the need for speed reducing WAIT states on
high performance microprocessor systems.
Atmel’s scaled CMOS technology provides high speed, lower active power consump-
tion, and significantly faster programming. Power consumption is typically only 8 mA
in Active Mode.
The AT27C520 is available in 173 mil, 20-pin TSSOP; 300 mil, 20-pin SOIC; and 28-
pin TSOP, one-time programmable (OTP) plastic packages.
(continued)
Pin Configurations
TSSOP Top View
Pin Name Function
A8 - A15 Addresses
AD0 - AD7 Addresses/Outputs
OE /VPP
ALE
Output Enable/VPP
Address Latch Enable
TSOP Top View
A10
NC
NC
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
NC
NC
A9
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21 A8
20 NC
19 NC
18 AD1
17 AD3
16 AD5
15 AD7
14 GND
13 AD6
12 AD4
11 AD2
10 NC
9 NC
8 AD0
A10
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
A9
1
2
3
4
5
6
7
8
9
10
20 A8
19 AD1
18 AD3
17 AD5
16 AD7
15 GND
14 AD6
13 AD4
12 AD2
11 AD0
SOIC Top View
OE/VPP
A15
A13
A11
A9
AD0
AD2
AD4
AD6
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 ALE
18 A14
17 A12
16 A10
15 A8
14 AD1
13 AD3
12 AD5
11 AD7
512K (64K x 8)
Multiplexed
Addresses/
Outputs
OTP EPROM
AT27C520
Rev. 0752C-C–01/98
1




AT27C520 pdf, 반도체, 판매, 대치품
DC and AC Operating Conditions for Read Operation
Operating Temp.(Case)
VCC Supply
Com.
Ind.
-70
0°C - 70°C
-40°C - 85°C
5V ± 10%
AT27C520
-90
0°C - 70°C
-40°C - 85°C
5V ± 10%
DC and Operating Characteristics for Read Operation
Symbol Parameter
ILI
ILI2(1)
Input Load Current
Input Load Current A13
ILO Output Leakage Current
ICC VCC Active Current
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
VOH Output High Voltage
Note: 1. For address input A13 only.
Condition
VIN = 0V to VCC
VIN = 0V to VCC
VOUT = 0V to VCC
f = 5 MHz, IOUT = 0 mA
IOL = 2.1 mA
IOH = -400 µA
Min Max Units
±1 µA
±100
µA
±5 µA
20 mA
-0.6 0.8 V
2.0
VCC + 0.5
V
0.4 V
2.4 V
AC Characteristics for Read Operation
Symbol
Parameter
Condition
tACC(2)
Address to Output Delay
ALE = OE/VPP = VIL
tAS Address Setup Time
OE/VPP = VIH
tAH Address Hold Time
OE/VPP = VIH
tALE
tOE(2)
tDF(3)(4)
Address Latch Enable Width
OE/VPP to Output Delay
OE/VPP High to Output Float
OE/VPP = VIH
ALE = VIL
ALE = VIL
tOH
Output Hold from Address or
OE/VPP , whichever occurred first
ALE = VIL
Notes: 1. 2, 3, 4 — see AC Waveforms for Read Operation
AT27C520
-70 -90
Min Max Min Max
70 90
12 15
12 15
40 45
30 35
25 25
70
Units
ns
ns
ns
ns
ns
ns
ns
4 AT27C520

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AT27C520 전자부품, 판매, 대치품
AT27C520
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
Symbol Parameter(1)
Test Conditions
Min Max Units
tALE
tLAS
tLAH
tLP
tOES
tOEH
tDS
tDH
tPW
tVR
tVCS
tOE
tDFP
tAS
tAH
tPRT
Notes:
Address Latch Enable Width
500 ns
Latched Address Setup Time
100 ns
Latched Address Hold Time
100 ns
ALE Low to OE/VPP High Voltage Delay
OE/VPP Setup Time
OE/VPP Hold Time
Data Setup Time
Data Hold Time
ALE Program Pulse Width(2)
OE/VPP Recovery Time
VCC Setup Time
Data Valid from OE/VPP
OE/VPP High to Output Float Delay(3)
Address Setup Time
Input Rise and Fall Times
(10% to 90%) 20 ns
2
2
2
Input Pulse Levels
0.45V to 2.4V
2
2
Input Timing Reference Level
47.5 52.5
0.8V to 2.0V 2
Output Timing Reference Level
0.8V to 2.0V
2
0
150
130
2
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
Address Hold Time
0 µs
OE/VPP Pulse Rise Time During Programming
50 ns
1. VCC must be applied simultaneously or before OE/VPP and removed simultaneously or after OE/VPP.
2. Program Pulse width tolerance is 50 µsec ± 5%.
3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
— see timing diagram.
Atmel’s 27C520 Integrated Product Identification Code
Codes
Manufacturer
Device Type
Pins
Hex
A8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 Data
0 0 0 0 1 1 1 1 0 1E
1 1 0 0 1 1 1 0 1 9D
7

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