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PDF AT27LV010A-15 Data sheet ( Hoja de datos )
| Número de pieza | AT27LV010A-15 | |
| Descripción | 1 Megabit 128K x 8 Low Voltage OTP CMOS EPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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AT27LV010A
Features
Fast Read Access Time - 90 ns
•• Dual Voltage Range Operation
Low Voltage Power Supply Range, 3.0V to 3.6V
or Standard 5V ± 10% Supply Range
Compatible with JEDEC Standard AT27C010
•• Low Power CMOS Operation
20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V
29 mW max. Active at 5 MHz for VCC = 3.6V
• JEDEC Standard Packages
32-Lead PLCC
32-Lead TSOP
• High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 100 µs/byte (typical)
• CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL
Integrated Product Identification Code
•• Commercial and Industrial Temperature Ranges
1 Megabit
(128K x 8)
Low Voltage
OTP
CMOS EPROM
Description
The AT27LV010A is a high performance, low power, low voltage 1,048,576 bit one-
time programmable read only memory (OTP EPROM) organized as 128K by 8 bits.
It requires only one supply in the range of 3.0V to 3.6V in normal read mode opera-
tion, making it ideal for fast, portable systems using battery power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3.3V supply. At VCC = 3.0V, any byte can be
accessed in less than 90 ns. With a typical power dissipation of only 18 mW at 5 MHz
and VCC = 3.3V, the AT27LV010A consumes less than one fifth the power of a stand-
ard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V.
Pin Configurations
(continued) AT27LV010A
Pin Name
A0 - A16
O0 - O7
CE
OE
PGM
NC
Function
Addresses
Outputs
Chip Enable
Output Enable
Program Strobe
No Connect
PLCC Top View
TSOP Top View
Type 1
0548B
3-95
1 page  
AT27LV010A
AC Characteristics for Read Operation (VCC = 3.0V to 3.6V and 4.5V to 5.5V)
AT27LV010A
-90 -12 -15
Symbol
tACC (3)
tCE (2)
tOE (2, 3)
tDF (4, 5)
tOH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to Output Float,
whichever occurred first
Output Hold from Address, CE or OE,
whichever occurred first
Condition
CE = OE = VIL
OE = VIL
CE = VIL
Min Max Min Max Min Max Units
90 120 150 ns
90 120 150 ns
50 50 60 ns
40 40 50 ns
0 0 0 ns
Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.
AC Waveforms for Read Operation (1)
Notes: 1. Timing measurement references are 0.8V and 2.0V.
Input AC drive levels are 0.45V and 2.4V, unless
otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE .
3. OE may be delayed up to tACC - tOE after the address
is valid without impact on tACC .
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no
longer driven.
3-99
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| PDF Descargar | [ Datasheet AT27LV010A-15.PDF ] | |
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