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PDF AT27LV020A-15VC Data sheet ( Hoja de datos )
| Número de pieza | AT27LV020A-15VC | |
| Descripción | 2 Megabit 256K x 8 Low Voltage OTP EPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Fast Read Access Time - 90 ns
• Dual Voltage Range Operation
Low Voltage Power Supply Range, 3.0V to 3.6V
or Standard 5V ± 10% Supply Range
• Compatible with JEDEC Standard AT27C020
• Low Power CMOS Operation
20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V
29 mW max. Active at 5 MHz for VCC = 3.6V
• JEDEC Standard Packages
32-Lead PLCC
32-Lead TSOP (8 X 20 mm)
32-Lead VSOP (8 x 14 mm)
• High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
• Rapid™Programming Algorithm - 100 µs/byte (typical)
• Two-Line Control
• CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
The AT27LV020A is a high performance, low power, low voltage 2,097,152 bit one-
time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It
requires only one supply in the range of 3.0 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using battery power.
Pin Configurations
Pin Name
A0 - A17
O0 - O7
CE
OE
PGM
Function
Addresses
Outputs
Chip Enable
Output Enable
Program Strobe
2 Megabit
(256K x 8)
Low Voltage
OTP EPROM
AT27LV020A
PLCC, Top View
TSOP, VSOP Top View
Type 1
0549B-A–9/97
1
1 page  
AT27LV020A
AC Characteristics for Read Operation (VCC = 3.0V to 3.6V and 4.5V to 5.5V)
AT27LV020A
-90 -12 -15
Symbol
tACC (3)
tCE (2)
tOE (2, 3)
tDF (4, 5)
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to Output Float,
whichever occurred first
Condition
Min Max Min Max Min Max
CE = OE = VIL
OE = VIL
CE = VIL
90
90
50
40
120 150
120 150
50 60
40 50
tOH Output Hold from Address, CE or OE,
whichever occurred first
000
AC Waveforms for Read Operation (1)
Units
ns
ns
ns
ns
ns
Notes:
1. Timing measurement references are 0.8V and 2.0V.
Input AC drive levels are 0.45V and 2.4V, unless oth-
erwise specififed.
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address
is valid without impact on tACC.
4. This parameter is only sampled and is not 100%
tested.
5. Output float is defined as the point when data is no
longer driven.
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AT27LV020A-15VC.PDF ] | |
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