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PDF AT28C010 Data sheet ( Hoja de datos )
| Número de pieza | AT28C010 | |
| Descripción | 1-Megabit (128K x 8) Paged Parallel EEPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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1. AT28C010  Hay una vista previa y un enlace de descarga de AT28C010 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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Features
• Fast Read Access Time - 120 ns
• Automatic Page Write Operation
– Internal Address and Data Latches for 128-Bytes
– Internal Control Timer
• Fast Write Cycle Time
– Page Write Cycle Time - 10 ms Maximum
– 1 to 128-Byte Page Write Operation
• Low Power Dissipation
– 80 mA Active Current
– 300µA CMOS Standby Current
• Hardware and Software Data Protection
• DATA Polling for End of Write Detection
• High Reliability CMOS Technology
– Endurance: 104 or 105 Cycles
– Data Retention: 10 Years
• Single 5V 10% Supply
• CMOS and TTL Compatible Inputs and Outputs
• JEDEC Approved Byte-Wide Pinout
AT28C010 Mil
1-Megabit
(128K x 8)
Paged Parallel
EEPROMs
AT28C010
Military
Pin Configuration
Pin Name
Function
A0 - A16
Addresses
CE Chip Enable
OE Output Enable
WE Write Enable
I/O0 - I/O7
Data Inputs/Outputs
NC No Connect
CERDIP, FLATPACK
Top View
44 LCC
Top View
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 WE
30 NC
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
A12 7
A7 8
A6 9
A5 10
NC 11
NC 12
NC 13
A4 14
A3 15
A2 16
A1 17
(continued)
32 LCC
Top View
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O0 13
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
39 A13
38 A8
37 A9
36 A11
35 NC
34 NC
33 NC
32 NC
31 OE
30 A10
29 CE
PGA
Top View
Atmel-0010I-PEEPR-AT28C010-Datasheet_062015
1 page  
AT28C010 Military
DC Characteristics (Continued)
Symbol
VIH
VOL
VOH1
VOH2
Parameter
Input High Voltage
Output Low Voltage
Output High Voltage
Output High Voltage CMOS
Condition
IOL = 2.1 mA
IOH = -400 A
IOH = -100 A; VCC = 4.5V
Min Max Units
2.0 V
0.45 V
2.4 V
4,2 V
AC Read Characteristics
Symbol
tACC
tCE (1)
tOE (2)
tDF (3, 4)
tOH
tCEPH(5)
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
Output Hold from OE, CE or
Address, whichever occurred first
CE Pulse High Time
AT28C010-12
Min Max
120
120
0 50
0 50
0
50
AT28C010-15
Min Max
150
150
0 55
0 55
0
50
AC Read Waveforms(1)(2)(3)(4)
AT28C010-20
Min Max
200
200
0 55
0 55
0
50
AT28C010-25
Min Max
250
250
0 55
0 55
0
50
Units
ns
ns
ns
ns
ns
ns
Notes:
1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC -
tOE after an address change without impact in tACC.
3. tDF is specified from OE or CE wichever occurs first (CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
5. If CE is de-asserted, it must remain de-asserted for at least 50ns during read operations other-
wise incorrect data may be read.
Atmel-0010I-PEEPR-AT28C010-Datasheet_062015
5
5 Page 
AT28C010 Military
Data Polling Characterstics(1)
Symbol
tDH
tOEH
tOE
tWR
Parameter
Min Typ
Data Hold Time
10
OE Hold Time
10
OE to Output Delay (2)
Write Recovery Time
0
Notes: 1. These parameters are characterized and not 100% tested.
2. See AC Read Characteristics.
Data Polling Waveforms
Max Units
ns
ns
ns
ns
Toggle Bit Characteristics(1)
Symbol
tDH
tOEH
tOE
tOEHP
tWR
Parameter
Min Typ
Data Hold Time
10
OE Hold Time
10
OE to Output Delay (2)
OE High Pulse
150
Write Recovery Time
0
Notes: 1. These parameters are characterized and not 100% tested.
2. See AC Read Characteristics.
Toggle Bit Waveforms(1)(2)(3)
Max Units
ns
ns
ns
ns
ns
Notes:
1. Toggling either OE or CE or both OE and CE will operate toggle bit.
2. Beginning and ending state of I/O6 will vary.
3. Any addres location may be used but the address should not vary.
Atmel-0010I-PEEPR-AT28C010-Datasheet_062015
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AT28C010.PDF ] | |
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