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PDF AT28HC64B Data sheet ( Hoja de datos )
| Número de pieza | AT28HC64B | |
| Descripción | 64K (8K x 8) High-speed Parallel EEPROM | |
| Fabricantes | ATMEL Corporation | |
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Features
• Fast Read Access Time – 70 ns
• Automatic Page Write Operation
– Internal Address and Data Latches for 64 Bytes
• Fast Write Cycle Times
– Page Write Cycle Time: 10 ms Maximum (Standard)
2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)
– 1 to 64-byte Page Write Operation
• Low Power Dissipation
– 40 mA Active Current
– 100 µA CMOS Standby Current
• Hardware and Software Data Protection
• DATA Polling and Toggle Bit for End of Write Detection
• High Reliability CMOS Technology
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
• Single 5 V ±10% Supply
• CMOS and TTL Compatible Inputs and Outputs
• JEDEC Approved Byte-wide Pinout
• Industrial Temperature Ranges
• Green (Pb/Halide-free) Packaging Option Only
1. Description
The AT28HC64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 55 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28HC64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA polling of I/O7. Once the end of a write cycle has been detected, a
new access for a read or write can begin.
Atmel’s AT28HC64B has additional features to ensure high quality and manufactura-
bility. The device utilizes internal error correction for extended endurance and
improved data retention characteristics. An optional software data protection mecha-
nism is available to guard against inadvertent writes. The device also includes an
extra 64 bytes of EEPROM for device identification or tracking.
64K (8K x 8)
High-speed
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28HC64B
0274L–PEEPR–2/3/09
1 page  
AT28HC64B
5. DC and AC Operating Range
Operating Temperature (Case)
VCC Power Supply
AT28HC64B-70
-40°C - 85°C
5 V ±10%
6. Operating Modes
Mode
CE
Read
Write(2)
Standby/Write Inhibit
Write Inhibit
VIL
VIL
VIH
X
Write Inhibit
X
Output Disable
X
Chip Erase
Notes: 1. X can be VIL or VIH.
2. See “AC Write Waveforms” on page 8.
3. VH = 12.0 V ±0.5 V.
VIL
7. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground .................................-0.6 V to +6.25 V
All Output Voltages
with Respect to Ground ...........................-0.6 V to VCC + 0.6 V
Voltage on OE and A9
with Respect to Ground ..................................-0.6 V to +13.5V
AT28HC64B-90
-40°C - 85°C
5 V ±10%
AT28HC64B-120
-40°C - 85°C
5 V ±10%
OE
VIL
VIH
X(1)
X
VIL
VIH
VH(3)
WE I/O
VIH DOUT
VIL DIN
X High Z
VIH
X
X High Z
VIL High Z
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
8. DC Characteristics
Symbol Parameter
Condition
ILI
ILO
ISB1
ISB2
ICC
VIL
VIH
VOL
VOH
Note:
Input Load Current
Output Leakage Current
VCC Standby Current CMOS
VCC Standby Current TTL
VCC Active Current
Input Low Voltage
VIN = 0 V to VCC + 1 V
VI/O = 0 V to VCC
CE = VCC - 0.3 V to VCC + 1 V
CE = 2.0 V to VCC + 1 V
f = 5 MHz; IOUT = 0 mA
Input High Voltage
Output Low Voltage
IOL = 2.1 mA
Output High Voltage
IOH = -400 µA
1. ISB1 and ISB2 for the 55 ns part is 40 mA maximum.
Min Max Units
10 µA
10 µA
100(1)
µA
2(1) mA
40 mA
0.8 V
2.0 V
0.40 V
2.4 V
0274L–PEEPR–2/3/09
5
5 Page 
AT28HC64B
22. Data Polling Characteristics(1)
Symbol Parameter
Min Typ Max
tDH
tOEH
tOE
tWR
Note:
Data Hold Time
0
OE Hold Time
0
OE to Output Delay(1)
Write Recovery Time
0
1. These parameters are characterized and not 100% tested. See “AC Read Characteristics” on page 6.
23. Data Polling Waveforms
Units
ns
ns
ns
ns
tOEH
tDH
tOE
tWR
24. Toggle Bit Characteristics(1)
Symbol Parameter
tDH
tOEH
tOE
tOEHP
tWR
Notes:
Data Hold Time
OE Hold Time
OE to Output Delay(2)
OE High Pulse
Write Recovery Time
1. These parameters are characterized and not 100% tested.
2. See “AC Read Characteristics” on page 6.
25. Toggle Bit Waveforms(1)(2)(3)
Min Typ Max Units
10 ns
10 ns
ns
150 ns
0 ns
tOEH
tDH tOE
(2)
Notes:
1. Toggling either OE or CE or both OE and CE will operate toggle bit.
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used, but the address should not vary.
0274L–PEEPR–2/3/09
tWR
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AT28HC64B.PDF ] | |
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