AT28LV010 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 AT28LV010
기능 1-Megabit (128K x 8) Low Voltage Paged Parallel EEPROM
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AT28LV010 데이터시트, 핀배열, 회로
Single 3.3V ± 10% Supply
Fast Read Access Time – 200 ns
Automatic Page Write Operation
– Internal Address and Data Latches for 128 Bytes
– Internal Control Timer
Fast Write Cycle Time
– Page Write Cycle Time – 10 ms Maximum
– 1 to 128-Byte Page Write Operation
Low Power Dissipation
– 15 mA Active Current
– 20 µA CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
– Endurance: 105 Cycles
– Data Retention: 10 Years
JEDEC Approved Byte-Wide Pinout
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option Only
1. Description
The AT28LV010 is a high-performance 3-volt only Electrically Erasable and Program-
mable Read-Only Memory. Its 1 megabit of memory is organized as 131,072 words by
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device
offers access times to 200 ns with power dissipation of just 54 mW. When the device
is deselected, the CMOS standby current is less than 20 µA.
The AT28LV010 is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 128-byte page register to allow
writing of up to 128 bytes simultaneously. During a write cycle, the address and 1 to
128 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA polling of I/O7. Once the end of a write cycle has been detected a
new access for a read or write can begin.
Atmel’s 28LV010 has additional features to ensure high quality and manufacturability.
The device utilizes internal error correction for extended endurance and improved
data retention characteristics. Software data protection is implemented to guard
against inadvertent writes. The device also includes an extra 128 bytes of EEPROM
for device identification or tracking.
(128K x 8)
Low Voltage
Paged Parallel

AT28LV010 pdf, 반도체, 판매, 대치품
4.3 DATA Polling
The AT28LV010 features DATA Polling to indicate the end of a write cycle. During a byte or
page write cycle an attempted read of the last byte written will result in the complement of the
written data to be presented on I/O7. Once the write cycle has been completed, true data is
valid on all outputs, and the next write cycle may begin. DATA Polling may begin at anytime
during the write cycle.
4.4 Toggle Bit
In addition to DATA Polling the AT28LV010 provides another method for determining the end
of a write cycle. During the write operation, successive attempts to read data from the device
will result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop
toggling and valid data will be read. Reading the toggle bit may begin at any time during the
write cycle.
4.5 Data Protection
If precautions are not taken, inadvertent writes may occur during transitions of the host system
power supply. Atmel® has incorporated both hardware and software features that will protect
the memory against inadvertent writes.
Hardware Protection
Hardware features protect against inadvertent writes to the AT28LV010 in the following ways:
(a) VCC power-on delay – once VCC has reached 2.0V (typical) the device will automatically
time out 5 ms (typical) before allowing a write; (b) write inhibit – holding any one of OE low, CE
high or WE high inhibits write cycles; and (c) noise filter – pulses of less than 15 ns (typical) on
the WE or CE inputs will not initiate a write cycle.
Software Data Protection
The AT28LV010 incorporates the industry standard software data protection (SDP) function.
Unlike standard 5-volt only EEPROM’s, the AT28LV010 has SDP enabled at all times. There-
fore, all write operations must be preceded by the SDP command sequence.
The data in the 3-byte command sequence is not written to the device; the addresses in the
command sequence can be utilized just like any other location in the device. Any attempt to
write to the device without the 3-byte sequence will start the internal timers. No data will be
written to the device. However, for the duration of tWC, read operations will effectively be poll-
ing operations.
4 AT28LV010


AT28LV010 전자부품, 판매, 대치품
11. Input Test Waveforms and Measurement Level
tR, tF < 5 ns
12. Output Test Load
13. Pin Capacitance
f = 1 MHz, T = 25°C(1)
8 12
1. This parameter is characterized and is not 100% tested.
VIN = 0V


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1-Megabit (128K x 8) Low Voltage Paged Parallel EEPROM

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