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PDF AT29C256-12TC Data sheet ( Hoja de datos )
| Número de pieza | AT29C256-12TC | |
| Descripción | 256K 32K x 8 5-volt Only CMOS Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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AT29C256
Features
Fast Read Access Time - 70 ns
• 5-Volt-Only Reprogramming
•• Page Program Operation
Single Cycle Reprogram (Erase and Program)
Internal Address and Data Latches for 64-Bytes
Internal Program Control and Timer
• Hardware and Software Data Protection
•• Fast Program Cycle Times
Page (64-Byte) Program Time - 10 ms
Chip Erase Time - 10 ms
DATA Polling for End of Program Detection
•• Low Power Dissipation
50 mA Active Current
300 µA CMOS Standby Current
Typical Endurance > 10,000 Cycles
•• Single 5V ± 10% Supply
CMOS and TTL Compatible Inputs and Outputs
•• Commercial and Industrial Temperature Ranges
256K (32K x 8)
5-volt Only
CMOS Flash
Memory
Description
The AT29C256 is a 5-volt-only in-system Flash programmable and erasable read only
memory (PEROM). Its 256K of memory is organized as 32,768 words by 8 bits. Manu-
factured with Atmel’s advanced nonvolatile CMOS technology, the device offers ac-
cess times to 70 ns with power dissipation of just 275 mW. When the device is dese-
lected, the CMOS standby current is less than 300 µA. The device endurance is such
that any sector can typically be written to in excess of 10,000 times.
Pin Configurations
Pin Name Function
DIP Top View
(continued)
A0 - A14 Addresses
CE Chip Enable
OE Output Enable
WE Write Enable
I/O0 - I/O7 Data Inputs/Outputs
NC No Connect
DC Don’t Connect
AT29C256
PLCC Top View
TSOP Top View
Type 1
Note: PLCC package pins 1 and 17
are DON’T CONNECT.
0046L
4-93
1 page  
AT29C256
AC Read Characteristics
Symbol
tACC
tCE (1)
tOE (2)
tDF (3, 4)
tOH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
Output Hold from OE,
CE or Address,
whichever occurred first
AT29C256-70
Min Max
70
70
0 40
0 25
0
AC Read Waveforms (1, 2, 3, 4)
AT29C256-90
Min Max
90
90
0 40
0 25
0
AT29C256-12
Min Max
120
120
0 50
0 30
0
AT29C256-15
Min Max
150
150
0 70
0 40
0
Units
ns
ns
ns
ns
ns
Notes: 1. CE may be delayed up to tACC - tCE after the address
transition without impact on tACC .
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE or by tACC - tOE
after an address change without impact on tACC .
3. tDF is specified from OE or CE whichever occurs first
(CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
Input Test Waveforms and Measurement Level
Output Test Load
tR, tF < 5 ns
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ Max
CIN 4 6
COUT
8 12
Note: 1. This parameter is characterized and is not 100% tested.
Units
pF
pF
Conditions
VIN = 0V
VOUT = 0V
4-97
5 Page 
AT29C256
4-103
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AT29C256-12TC.PDF ] | |
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